Publications by authors named "Zota C"

Multiplexed local charge storage, close to quantum processors at cryogenic temperatures could generate a multitude of control signals, for electronics or qubits, in an efficient manner. Such cryogenic electronics require generating quasi-static control signals with small area footprint, low noise, high stability, low power dissipation and, ideally, in a multiplexed fashion to reduce the number of input/outputs. In this work, we integrate capacitors with cryogenic high-electron mobility transistor (HEMT) arrays and demonstrate quasi-static bias generation using gate pulses controlled in time and frequency domains.

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Weyl semimetals are defined by their unique Fermi surface, comprising pairs of Weyl points of opposite chirality, connected through topological surface states. Angle-resolved photoemission spectroscopy (ARPES) has been used to verify the existence of the Weyl points and the Fermi arcs. However, ARPES is limited in resolution, leading to significant uncertainty when characterizing the shape of the Fermi surface of semimetals and measuring features such as the distance between the Weyl points.

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The resistivity scaling of Cu electrical interconnects represents a critical challenge in Si CMOS technology. As interconnect dimensions reach below 10 nm, Cu resistivity increases significantly due to surface scattering. Topological materials have been considered for application in ultra-scaled interconnects (below 5 nm), due to their topologically protected surface states that have reduced electron scattering.

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The chiral anomaly - a hallmark of chiral spin-1/2 Weyl fermions - is an imbalance between left- and right-moving particles that underpins phenomena such as particle decay and negative longitudinal magnetoresistance in Weyl semimetals. The discovery that chiral crystals can host higher-spin generalizations of Weyl quasiparticles without high-energy counterparts, known as multifold fermions, raises the fundamental question of whether the chiral anomaly is a more general phenomenon. Answering this question requires materials with chiral quasiparticles within a sizable energy window around the Fermi level that are unaffected by extrinsic effects such as current jetting.

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Semiconductor transistors operate by modulating the charge carrier concentration of a channel material through an electric field coupled by a capacitor. This mechanism is constrained by the fundamental transport physics and material properties of such devices-attenuation of the electric field, and limited mobility and charge carrier density in semiconductor channels. In this work, we demonstrate a new type of transistor that operates through a different mechanism.

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In recent times the chiral semimetal cobalt monosilicide (CoSi) has emerged as a prototypical, nearly ideal topological conductor hosting giant, topologically protected Fermi arcs. Exotic topological quantum properties have already been identified in CoSi bulk single crystals. However, CoSi is also known for being prone to intrinsic disorder and inhomogeneities, which, despite topological protection, risk jeopardizing its topological transport features.

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III-V semiconductors are being considered as promising candidates to replace silicon channel for low-power logic and RF applications in advanced technology nodes. InGaAs is particularly suitable as the channel material in n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), due to its high electron mobility. In the present work, we report on InGaAs FinFETs monolithically integrated on silicon substrates.

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The tunnel field-effect transistor (TFET) is regarded as one of the most promising solid-state switches to overcome the power dissipation challenge in ultra-low power integrated circuits. TFETs take advantage of quantum mechanical tunneling hence exploit a different current control mechanism compared to standard MOSFETs. In this review, we describe state-of-the-art development of TFET both in terms of performances and of materials integration and we identify the main remaining technological challenges such as heterojunction defects and oxide/channel interface traps causing trap-assisted-tunneling (TAT).

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InGaAs nanowires is one of the promising material systems of replacing silicon in future CMOS transistors, due to its high electron mobility in combination with the excellent electrostatic control from the tri-gate geometry. In this article, we report on gated Hall measurements on single and multiple InGaAs nanowires, selectively grown in a Hall bridge geometry with nanowire widths down to 50 nm and thicknesses of 10 nm. The gated nanowires can be used as junctionless transistors, which allows for a simplified device processing as no regrowth of contact layer or ion implantation is needed, which is particularly beneficial as transistor dimensions are scaled down.

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Article Synopsis
  • Scientists studied tiny wires made of a special material called In0.85Ga0.15As to see how electricity flows through them.
  • They found that these wires had very little resistance, which helped them measure how well electricity travels and discovered some neat steps in how the electricity conducts at really cold temperatures.
  • They also looked at the wires using light to find that there was extra indium in the material and that the wires were less stretched than before.
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