Photolithography-Induced Doping and Interface Modulation for High-Performance Monolayer WSe P-Type Transistors.

To mitigate Fermi-level pinning (FLP) at the contact of two-dimensional (2D) transition metal dichalcogenides and enhance their hole carrier concentration, a 1.8 nm-thick p-doping layer is formed via photolithography. This surface treatment significantly reduces the contact resistance () to ∼4.