Publications by authors named "Yugo Nose"
Article Synopsis
- The study introduces robust design methods for a vertical avalanche photodiode-based CMOS image sensor, focusing on three practical factors: eliminating guard rings for better pixel isolation, ensuring device performance is stable regardless of voltage and temperature changes, and maintaining consistent operation under intense light conditions.
- The design minimizes trade-offs between electric field concentration and pixel isolation, validated through both simulations and experiments, resulting in effective optimization strategies.
- A global feedback resistor is used to stabilize device characteristics, while an in-pixel overflow transistor improves resistance to high illumination; the sensor's robustness is confirmed by extensive testing on multiple chips under extreme conditions for over 1000 hours.
We have developed a direct time-of-flight (TOF) 250 m ranging Complementary Metal Oxide Semiconductor (CMOS) image sensor (CIS) based on a 688 × 384 pixels array of vertical avalanche photodiodes (VAPD). Each pixel of the CIS comprises VAPD with a standard four transistor pixel circuit equipped with an analogue capacitor to accumulate or count avalanche pulses. High power near infrared (NIR) short (<50 ns) and repetitive (6 kHz) laser pulses are illuminated through a diffusing optics.
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