Single-wall carbon nanotubes (SWNTs) possess superior geometrical, electronic, chemical, thermal, and mechanical properties and are very attractive for applications in electronic devices and circuits. To make this a reality, the nanotube orientation, density, diameter, electronic property, and even chirality should be well controlled. This Feature article focuses on recent achievements researchers have made on the controlled growth of horizontally aligned SWNTs and SWNT arrays on substrates and their electronic applications.
View Article and Find Full Text PDFIn this paper, we applied self-aligned T-gate design to aligned carbon nanotube array transistors and achieved an extrinsic current-gain cutoff frequency (ft) of 25 GHz, which is the best on-chip performance for nanotube radio frequency (RF) transistors reported to date. Meanwhile, an intrinsic current-gain cutoff frequency up to 102 GHz is obtained, comparable to the best value reported for nanotube RF transistors. Armed with the excellent extrinsic RF performance, we performed both single-tone and two-tone measurements for aligned nanotube transistors at a frequency up to 8 GHz.
View Article and Find Full Text PDFThe development of guided chemical vapor deposition (CVD) growth of single-walled carbon nanotubes provides a great platform for wafer-scale integration of aligned nanotubes into circuits and functional electronic systems. However, the coexistence of metallic and semiconducting nanotubes is still a major obstacle for the development of carbon-nanotube-based nanoelectronics. To address this problem, we have developed a method to obtain predominantly semiconducting nanotubes from direct CVD growth.
View Article and Find Full Text PDFCarbon nanotube RF transistors are predicted to offer good performance and high linearity when operated in the ballistic transport and quantum capacitance regime; however, realization of such transistors has been very challenging. In this paper, we introduce a self-aligned fabrication method for carbon nanotube RF transistors, which incorporate a T-shaped (mushroom-shaped) aluminum gate, with oxidized aluminum as the gate dielectric. In this way, the channel length can be scaled down to 140 nm, which enables quasi-ballistic transport, and the gate dielectric is reduced to 2-3 nm aluminum oxide, leading to quasi-quantum capacitance operation.
View Article and Find Full Text PDFExceptional electronic properties of graphene make it a promising candidate as a material for next generation electronics; however, self-aligned fabrication of graphene transistors has not been fully explored. In this paper, we present a scalable method for fabrication of self-aligned graphene transistors by defining a T-shaped gate on top of graphene, followed by self-aligned source and drain formation by depositing Pd with the T-gate as a shadow mask. This transistor design provides significant advantages such as elimination of misalignment, reduction of access resistance by minimizing ungated graphene, and reduced gate charging resistance.
View Article and Find Full Text PDFDue to extraordinary electrical properties, preseparated, high purity semiconducting carbon nanotubes hold great potential for thin-film transistors (TFTs) and integrated circuit applications. One of the main challenges it still faces is the fabrication of air-stable n-type nanotube TFTs with industry-compatible techniques. Here in this paper, we report a novel and highly reliable method of converting the as-made p-type TFTs using preseparated semiconducting nanotubes into air-stable n-type transistors by adding a high-κ oxide passivation layer using atomic layer deposition (ALD).
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