Publications by authors named "Y Rezaeiyan"

The realization of brain-scale spiking neural networks (SNNs) is impeded by power constraints and low integration density. To address these challenges, multi-core SNNs are utilized to emulate numerous neurons with high energy efficiency, where spike packets are routed through a network-on-chip (NoC). However, the information can be lost in the NoC under high spike traffic conditions, leading to performance degradation.

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In this work, we present fabricated magnetic tunnel junctions (MTJs) that can serve as magnetic memories (MMs) or vortex spin-torque nano-oscillators (STNOs) depending on the device geometry. We explore the heating effect on the devices to study how the performance of a neuromorphic computing system (NCS) consisting of MMs and STNOs can be enhanced by temperature. We further applied a neural network for waveform classification applications.

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Within this paper, we demonstrate the feasibility of the FPGA implementation as well as the 180nm CMOS circuit design of a particular biologically plausible supervised learning algorithm (ReSuMe). Based on the Spike-Timing-Dependent Plasticity (STDP) learning phenomenon, this design proposes a fully configurable implementation of STDP learning window function to adjust the learning process for different applications, optimizing results for each use case. The CMOS implementation in 180nm technology node supplied with 1.

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In this paper, we investigate the granularity in the free layer of the magnetic tunnel junctions (MTJ) and its potential to function as a reservoir for reservoir computing where grains act as oscillatory neurons while the device is in the vortex state. The input of the reservoir is applied in the form of a magnetic field which can pin the vortex core into different grains of the device in the magnetic vortex state. The oscillation frequency and MTJ resistance vary across different grains in a non-linear fashion making them great candidates to be served as the reservoir's outputs for classification objectives.

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This article presents a chip designed for wireless intra-cardiac monitoring systems. The design consists of a three-channel analog front-end, a pulse-width modulator featuring output-frequency offset and temperature calibration, and inductive data telemetry. By employing a resistance boosting technique in the instrumentation amplifier feedback, the pseudo-resistor exhibits lower non-linearity, leading to a total harmonic distortion of below 0.

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Synopsis of recent research by authors named "Y Rezaeiyan"

  • Y Rezaeiyan's research primarily focuses on neuromorphic computing and the development of advanced hardware systems, particularly spiking neural networks (SNNs) and spin-torque nano-oscillators for real-time data processing applications.
  • The studies highlight the importance of energy-efficient architectures, showcasing multi-core SNNs and novel magnetic tunnel junction designs that enhance performance through innovative approaches to oscillation and temperature management.
  • Additionally, Rezaeiyan explores practical implementations of biologically inspired learning algorithms in FPGA and CMOS technology, emphasizing the adaptability of these systems for various computational tasks and healthcare monitoring solutions.