Detachable interface toward a low-loss reflow-compatible fiber coupling for co-packaged optics (CPO).

High-density reflow-compatible fiber I/O is one of the challenges for co-packaged optics (CPO). This paper developed a detachable coupling interface based on expanded beam edge coupling, which can be applied for optical coupling between lasers, PICs, and fibers, seamlessly supporting many channels with high efficiency. It comprises a removable fiber connector and a permanent chip/device connector, in which microlens/lens arrays are used for waveguide mode expansion and MT-like connectors are used for position registration.

Pass-block architecture for distributed-phase-reference quantum key distribution using silicon photonics.

Secure transmission of information is an indispensable part of the government and individual activities. Quantum key distribution (QKD), ascribed to its security based on the laws of quantum mechanics, has become an urgent research task to eliminate the rapidly growing threats of the ever-evolving large-scale quantum computing. In this Letter, we propose a silicon photonics transmitter using a pass-block architecture and experimentally demonstrated its performance with a demodulation chip for high-speed distributed-phase-reference QKD.

Efficient, tunable flip-chip-integrated III-V/Si hybrid external-cavity laser array.

We demonstrate a surface-normal coupled tunable hybrid silicon laser array for the first time using passively-aligned, high-accuracy flip chip bonding. A 2x6 III-V reflective semiconductor optical amplifier (RSOA) array with integrated total internal reflection mirrors is bonded to a CMOS SOI chip with grating couplers and silicon ring reflectors to form a tunable hybrid external-cavity laser array. Waveguide-coupled wall plug efficiency (wcWPE) of 2% and output power of 3 mW has been achieved for all 12 lasers.

Error-free operation of a polarization-insensitive 4λ x 25 Gbps silicon photonic WDM receiver with closed-loop thermal stabilization of Si microrings.

We report the first closed-loop operation of a 100 Gbps polarization-insensitive, 4-channel wavelength-tracking WDM receiver in silicon photonics platform. Error-free operation is achieved with input polarization scrambling over input wavelength change of 4.5 nm using efficient thermal tuning of Si microring demux, corresponding to greater than 60°C fluctuation in temperature.

Microring-based multi-chip WDM photonic module.

We report on a packaged prototype of a WDM photonic transceiver. It is an all-solid state hybrid assembly based on 130nm SOI photonic circuitry integrated with a 40nm CMOS VLSI driver. Our prototype supports eight tunable WDM channels operating at 10Gb/s, each capable of both transmitting and receiving data on the same chip.

An all-solid-state, WDM silicon photonic digital link for chip-to-chip communications.

We describe a multiwavelength hybrid-integrated solid-state link on a 3 µm silicon-on-insulator (SOI) nanophotonic platform. The link spans three chips and employs germanium-silicon electroabsorption waveguide modulators, silicon transport waveguides, echelle gratings for multiplexing and demultiplexing, and pure germanium waveguide photo-detectors. The 8λ WDM Tx and Rx components are interconnected via a routing "bridge" chip using edge-coupled optical proximity communication.

Demonstration of 12.2% wall plug efficiency in uncooled single mode external-cavity tunable Si/III-V hybrid laser.

A Si/III-V hybrid laser has been a highly sought after device for energy-efficient and cost-effective high-speed silicon photonics communication. We present a high wall-plug efficiency external-cavity hybrid laser created by integrating an independently optimized SOI ring reflector and a III-V gain chip. In our demonstration, the uncooled integrated laser achieved a waveguide-coupled wall-plug efficiency of 12.

A high-speed, tunable silicon photonic ring modulator integrated with ultra-efficient active wavelength control.

We report the first complete 10G silicon photonic ring modulator with integrated ultra-efficient CMOS driver and closed-loop wavelength control. A selective substrate removal technique was used to improve the ring tuning efficiency. Limited by the thermal tuner driver output power, a maximum open-loop tuning range of about 4.

High power and widely tunable Si hybrid external-cavity laser for power efficient Si photonics WDM links.

A highly efficient silicon (Si) hybrid external cavity laser with a wavelength tunable ring reflector is fabricated on a complementary metal-oxide semiconductor (CMOS)-compatible Si-on-insulator (SOI) platform and experimental results with high output power are demonstrated. A III-V semiconductor gain chip is edge-coupled into a SOI cavity chip through a SiN(x) spot size converter and Si grating couplers are incorporated to enable wafer-scale characterization. The laser output power reaches 20 mW and the highest wall-plug efficiency of 7.

Vertical-coupled high-efficiency tunable III-V- CMOS SOI hybrid external-cavity laser.

We demonstrate a hybrid III-V/SOI laser by vertically coupling a III-V RSOA chip with a SOI-CMOS chip containing a tunable wavelength selective reflector. We report a waveguide-coupled wall-plug-efficiency of 5.5% and output power of 10 mW.

Improving CMOS-compatible Germanium photodetectors.

We report design improvements for evanescently coupled Germanium photodetectors grown at low temperature. The resulting photodetectors with 10 μm Ge length manufactured in a commercial CMOS process achieve >0.8 A/W responsivity over the entire C-band, with a device capacitance of <7 fF based on measured data.

Ultralow-loss, high-density SOI optical waveguide routing for macrochip interconnects.

We report optical waveguides up to one meter long with 0.026 dB/cm loss fabricated in a 300nm thick SOI CMOS process. Combined with tight bends and compact interlayer grating couplers, we demonstrate a complete toolbox for ultralow-loss, high-density waveguide routing for macrochip interconnects.

Enhanced optical bistability from self-heating due to free carrier absorption in substrate removed silicon ring modulators.

We show enhanced optical bistability induced by free carrier absorption from junction doping in substrate-removed silicon ring modulators. Such linear thermal effects dominate the loss in high-speed depletion silicon ring modulators. Optical bistability was observed with about 100 μW of input optical power.

25Gb/s 1V-driving CMOS ring modulator with integrated thermal tuning.

We report a high-speed ring modulator that fits many of the ideal qualities for optical interconnect in future exascale supercomputers. The device was fabricated in a 130 nm SOI CMOS process, with 7.5 μm ring radius.

Ultra-efficient 10 Gb/s hybrid integrated silicon photonic transmitter and receiver.

Using low parasitic microsolder bumping, we hybrid integrated efficient photonic devices from different platforms with advanced 40 nm CMOS VLSI circuits to build ultra-low power silicon photonic transmitters and receivers for potential applications in high performance inter/intra-chip interconnects. We used a depletion racetrack ring modulator with improved electro-optic efficiency to allow stepper optical photo lithography for reduced fabrication complexity. Integrated with a low power cascode 2 V CMOS driver, the hybrid silicon photonic transmitter achieved better than 7 dB extinction ratio for 10 Gbps operation with a record low power consumption of 1.

Submilliwatt, ultrafast and broadband electro-optic silicon switches.

We present a broadband 2x2 electro-optic silicon switch with an ultralow switching power and fast switching time based on a Mach-Zehnder interferometer (MZI). Forward-biased p-i-n junctions are employed to tune the phase of silicon waveguides in the MZI, to achieve a π-phase switching power of 0.6 mW with a drive voltage 0.

Highly-efficient thermally-tuned resonant optical filters.

We demonstrate spectral tunability for microphotonic add-drop filters manufactured as ring resonators in a commercial 130 nm SOI CMOS technology. The filters are provisioned with integrated heaters built in CMOS for thermal tuning. Their thermal impedance has been dramatically increased by the selective removal of the SOI handler substrate under the device footprint using a bulk silicon micromachining process.

High-speed and compact silicon modulator based on a racetrack resonator with a 1 V drive voltage.

Fast, compact, and power-efficient silicon microcavity electro-optic modulators are expected to be critical components for chip-level optical interconnects. It is highly desirable that these modulators can be driven by voltage swings of 1 V or less to reduce power dissipation and make them compatible with voltage supply levels associated with current and future complementary metal-oxide-semiconductor technology nodes. Here, we present a silicon racetrack resonator modulator that achieves over 8 dB modulation depth at 12.

Wavelength-tunable silicon microring modulator.

We present a wavelength-tunable, compact, high speed and low power silicon microring modulator. With a ring radius of 5 microm, we demonstrate a modulator with a high speed of 12.5 Gbps and a driving voltage of 3 V to achieve approximately 6 dB extinction ratio in high speed measurement.

Low power and compact reconfigurable multiplexing devices based on silicon microring resonators.

We present thermally reconfigurable multiplexing devices based on silicon microring resonators with low tuning power and low thermal crosstalk. Micro-heaters on top of the rings are employed to tune the resonant wavelengths through the thermo-optic effect of silicon. We achieve a low tuning power of 21 mW per free spectral range for a single ring by exploiting thermal isolation trenches close to the ring waveguides.

A tunable 1x4 silicon CMOS photonic wavelength multiplexer/demultiplexer for dense optical interconnects.

We report the first compact silicon CMOS 1x4 tunable multiplexer/ demultiplexer using cascaded silicon photonic ring-resonator based add/drop filters with a radius of 12 microm, and integrated doped-resistor thermal tuners. We measured an insertion loss of less than 1 dB, a channel isolation of better than 16 dB for a channel spacing of 200 GHz, and a uniform 3 dB pass band larger than 0.4 nm across all four channels.

A macrochip interconnection network enabled by silicon nanophotonic devices.

We present an advanced wavelength-division multiplexing point-to-point network enabled by silicon nanophotonic devices. This network offers strictly non-blocking all-to-all connectivity while maximizing bisection bandwidth, making it ideal for multi-core and multi-processor interconnections. We introduce one of the key components, the nanophotonic grating coupler, and discuss, for the first time, how this device can be useful for practical implementations of the wavelength-division multiplexing network using optical proximity communications.

Ultra-low-energy all-CMOS modulator integrated with driver.

We report the first sub-picojoule per bit (400fJ/bit) operation of a silicon modulator intimately integrated with a driver circuit and embedded in a clocked digital transmitter. We show a wall-plug power efficiency below 400microW/Gbps for a 130nm SOI CMOS carrier-depletion ring modulator flip-chip integrated to a 90nm bulk Si CMOS driver circuit. We also demonstrate stable error-free transmission of over 1.

A sub-picojoule-per-bit CMOS photonic receiver for densely integrated systems.

We report ultra-low-power (690fJ/bit) operation of an optical receiver consisting of a germanium-silicon waveguide detector intimately integrated with a receiver circuit and embedded in a clocked digital receiver. We show a wall-plug power efficiency of 690microW/Gbps for the photonic receiver made of a 130nm SOI CMOS Ge waveguide detector integrated to a 90nm Si CMOS receiver circuit. The hybrid CMOS photonic receiver achieved a sensitivity of -18.

Low Vpp, ultralow-energy, compact, high-speed silicon electro-optic modulator.

We present a high-speed silicon optical modulator with a low V(pp) (peak-to-peak driving voltage) and ultralow energy consumption based on a microring resonator, with the refractive index modulation achieved by electric-field-induced carrier depletion in a reverse-biased lateral pn diode embedded in the ring structure. With a V(pp) of 2 V, we demonstrate a silicon modulator with a 3 dB bandwidth of 11 GHz, a modulation depth of 6.5 dB together with an insertion loss of 2 dB, ultralow energy consumption of 50 fJ per bit, and a small device active area of approximately 1000 microm(2).