Hot-spot engineering in polygonal nanofinger assemblies for surface enhanced Raman spectroscopy.

Multiparticle assemblies of nanoscale structures are the fundamental building blocks for powerful plasmonic devices. Here we show the controlled formation of polygonal metal nanostructure assemblies, including digon, trigon, tetragon, pentagon, and hexagon arrays, which were formed on top of predefined flexible polymer pillars that undergo self-coalescence, analogous to finger closing, with the aid of microcapillary forces. This hybrid approach of combining top-down fabrication with self-assembly enables the formation of complex nanoplasmonic structures with sub-nanometer gaps between gold nanoparticles.

Impact of geometry on the performance of memristive nanodevices.

We examined the influence of memristor geometry on switching endurance by comparing ribbed and planar TiO(2)-based cross-point devices with 50 nm × 50 nm lateral dimensions. We observed that planar devices exhibited a factor of over four improvement in median endurance value over ribbed structures for otherwise identical structures. Our simulations indicated that the corners in the upper wires of the ribbed devices experienced higher current density and more heating during device forming and switching, and hence a shorter life time.

Gold nanofingers for molecule trapping and detection.

Here we demonstrate a molecular trap structure that can be formed to capture analyte molecules in solution for detection and identification. The structure is based on gold-coated nanoscale polymer fingers made by nanoimprinting technique. The nanofingers are flexible and their tips can be brought together to trap molecules, while at the same time the gold-coated fingertips form a reliable Raman hot spot for molecule detection and identification based on surface enhanced Raman spectroscopy (SERS).

Self-aligned memristor cross-point arrays fabricated with one nanoimprint lithography step.

We demonstrate a technique to fabricate memristor cross-point arrays using a self-aligned, one step nanoimprint lithography process that simultaneously patterns the bottom electrode, switching material film and the top electrode. Since this process does not require overlay alignment, the fabrication complexity is greatly reduced and the throughput is significantly increased. The critical interfaces are exposed to much less contamination and thus under better chemical control.

Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

A hybrid nanomemristor/transistor logic circuit capable of self-programming.

Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metal-oxide-semiconductor field effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally configured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information. As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/amplifier outputs.

Memristive switching mechanism for metal/oxide/metal nanodevices.

Nanoscale metal/oxide/metal switches have the potential to transform the market for nonvolatile memory and could lead to novel forms of computing. However, progress has been delayed by difficulties in understanding and controlling the coupled electronic and ionic phenomena that dominate the behaviour of nanoscale oxide devices. An analytic theory of the 'memristor' (memory-resistor) was first developed from fundamental symmetry arguments in 1971, and we recently showed that memristor behaviour can naturally explain such coupled electron-ion dynamics.

Experimental demonstration of a defect-tolerant nanocrossbar demultiplexer.

Ultradense memory and logic circuits fabricated at local densities exceeding 100 × 10(9) cross-points per cm(2) have recently been demonstrated with nanowire crossbar arrays. Practical implementation of such nanocrossbar circuitry, however, requires effective demultiplexing to solve the problem of electrically addressing individual nanowires within an array. Importantly, such a demultiplexer (demux) must also be tolerant of the potentially high defect rates inherent to nanoscale circuit fabrication.

An organic/Si nanowire hybrid field configurable transistor.

We report a field configurable transistor (FCT) fabricated on a Si nanowire FET platform by integrating a thin film of conjugated polymer poly[2-methoxy-5-(2'-ethylhexyloxy)-p-phenylene vinylene] (MEH-PPV) and an ionic conductive layer (RbAg4I5) into the gate. The FCT can be precisely configured to desired nonvolatile analog state dynamically, repeatedly, and reversibly by controlling the concentration of iodide ions in the MEH-PPV layer with a gate voltage. The flexible configurability and plasticity of the FCT could facilitate field-programmable circuits for defect-tolerance and synapse-like devices for learning.

Towards the silicon nanowire-based sensor for intracellular biochemical detection.

A microneedle sensor platform with integrated silicon nanowire tip was developed for intracellular biochemical detection. Because of the virtue of miniaturized size and high sensitivity, this sensor has a great potential for studying individual cell or localized bioenvironment by revealing the pH level and/or enzyme activities. The fabrication of the microneedle sensor was primarily based on conventional silicon processing, where a silicon-on-insulator (SOI) wafer with 50 nm thick (100) p-type Si device layer was used as the substrate.

Regular arrays of monodisperse platinum/erbium disilicide core-shell nanowires and nanoparticles on Si(001) via a self-assembled template.

We have developed a process for fabricating monodisperse noble metal/rare earth disilicide core-shell nanoparticles and nanowires in regular arrays on Si(001) with a density of 5 x 10(10) / cm2, and over areas > 1 mm2. Pt deposited via physical vapor deposition on a self-assembled rare earth disilicide nanowire template combined with reactive ion etching produces arrays of nanostructures. SEM images demonstrate the ability to select nanowires or nanoparticles as a function of Pt coverage.

Improved pattern transfer in nanoimprint lithography at 30 nm half-pitch by substrate-surface functionalization.

Resist detachment from the substrate during mold-substrate separation is one of the key challenges for nanoimprint lithography as the pitch of features decreases. We analyzed the problem by considering the surface and interfacial free energies of the initial state and the possible final states of the mold-polymer-substrate system and designed the chemistry of the system to provide the desired final state. We dramatically improved the resist adhesion to the substrate by assembling a monolayer of surface linker molecules on the substrate surface.