Low-Frequency Noise Characteristics in Multi-Layer WSe₂ Field Effect Transistors with Different Contact Metals.

In this work, we analyze characteristics of Ohmic, Schottky forward and reverse contact through a low-frequency noise (LFN) measurement, combining two types of metals (Pd and Au) as the source and drain (S/D) contacts that enable -type properties in multi-layer WSe₂ field effect transistors (FETs). The LFN is one of the significant factors liming the performance of nano-scale devices such as TMDCs FETs having large surface-to-volume ratio. In addition, the LFN analysis, which relates to the device reliability, can help identify sensitive areas for current transport and evaluate the analog circuit applicability.

Emerging memory technologies for neuromorphic computing.

In this paper, we reviewed the recent trends on neuromorphic computing using emerging memory technologies. Two representative learning algorithms used to implement a hardware-based neural network are described as a bio-inspired learning algorithm and software-based learning algorithm, in particular back-propagation. The requirements of the synaptic device to apply each algorithm were analyzed.

A Split-Gate Positive Feedback Device With an Integrate-and-Fire Capability for a High-Density Low-Power Neuron Circuit.

Hardware-based spiking neural networks (SNNs) to mimic biological neurons have been reported. However, conventional neuron circuits in SNNs have a large area and high power consumption. In this work, a split-gate floating-body positive feedback (PF) device with a charge trapping capability is proposed as a new neuron device that imitates the integrate-and-fire function.

Accurate extraction of WSe2 FETs parameters by using pulsed I-V method at various temperatures.

This work investigates the intrinsic characteristics of multilayer WSe field effect transistors (FETs) by analysing Pulsed - (PIV) and DC characteristics measured at various temperatures. In DC measurement, unwanted charge trapping due to the gate bias stress results in - curves different from the intrinsic characteristic. However, PIV reduces the effect of gate bias stress so that intrinsic characteristic of WSe FETs is obtained.