Memristor-CMOS hybrid integrated circuits for reconfigurable logic.

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

Sub-10 nm nanoimprint lithography by wafer bowing.

We introduce the concept of wafer bowing to affect nanoimprinting. This approach allows a design that can fit the key imprinting mechanism into a compact module, which we have constructed and demonstrated with an overlay and resolution of <0.5 microm and <10 nm, respectively.

Plasma-induced formation of Ag nanodots for ultra-high-enhancement surface-enhanced Raman scattering substrates.

We report here plasma-induced formation of Ag nanostructures for surface-enhanced Raman scattering (SERS) applications. An array of uniform Ag patterned structures of 150 nm diameter was first fabricated on a silicon substrate with imprint lithography; then the substrate was further treated with an oxygen plasma to fracture the patterned structures into clusters of smaller, interconnected, closely packed Ag nanoparticles (20-60 nm) and redeposited Ag nanodots ( approximately 10 nm) between the clusters. The substrate thus formed had a uniform ultrahigh SERS enhancement factor (1010) over the entire substrate for 4-mercaptophenol molecules.

Circuit fabrication at 17 nm half-pitch by nanoimprint lithography.

High density metal cross bars at 17 nm half-pitch were fabricated by nanoimprint lithography. Utilizing the superlattice nanowire pattern transfer technique, a 300-layer GaAs/AlGaAs superlattice was employed to produce an array of 150 Si nanowires (15 nm wide at 34 nm pitch) as an imprinting mold. A successful reproduction of the Si nanowire pattern was demonstrated.

Improved pattern transfer in nanoimprint lithography at 30 nm half-pitch by substrate-surface functionalization.

Resist detachment from the substrate during mold-substrate separation is one of the key challenges for nanoimprint lithography as the pitch of features decreases. We analyzed the problem by considering the surface and interfacial free energies of the initial state and the possible final states of the mold-polymer-substrate system and designed the chemistry of the system to provide the desired final state. We dramatically improved the resist adhesion to the substrate by assembling a monolayer of surface linker molecules on the substrate surface.

Vapor-phase self-assembled monolayer for improved mold release in nanoimprint lithography.

Resist adhesion to the mold is one of the challenges for nanoimprint lithography. The main approach to overcoming it is to apply a self-assembled monolayer of an organosilane release agent to the mold surface, either in the solution phase or vapor phase. We compared the atomic force microscopy, ellipsometry, reflection-absorption infrared spectroscopy, and contact angle results collected from substrates treated by two different application processes and found that the vapor-phase process was superior.