Controlled atomic scale fabrication based on scanning probe patterning or surface assembly typically involves a complex process flow, stringent requirements for an ultra-high vacuum environment, long fabrication times and, consequently, limited throughput and device yield. We demonstrate a device platform that overcomes these limitations by integrating scanning-probe based dopant device fabrication with a CMOS-compatible process flow. Silicon on insulator substrates are used featuring a reconstructed Si(001):H surface that is protected by a capping chip and has pre-implanted contacts ready for scanning tunneling microscope (STM) patterning.
View Article and Find Full Text PDFThe transmission of light through a metallic film stack on a transparent substrate, perforated with a periodic array of cylindrical holes/nanocavities, is studied. The structure is fabricated by using self-assembled nanosphere lithography. Since one layer in the film stack is made of a ferromagnetic metal (iron), exposure of the structure to a solution containing iron oxide nanoparticles causes nanoparticle accumulation inside the nanocavities.
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