Remarkably High-Performance Nanosheet GeSn Thin-Film Transistor.

High-performance p-type thin-film transistors (pTFTs) are crucial for realizing low-power display-on-panel and monolithic three-dimensional integrated circuits. Unfortunately, it is difficult to achieve a high hole mobility of greater than 10 cm/V·s, even for SnO TFTs with a unique single-hole band and a small hole effective mass. In this paper, we demonstrate a high-performance GeSn pTFT with a high field-effect hole mobility (μ), of 41.

Improved Device Distribution in High-Performance SiN Resistive Random Access Memory via Arsenic Ion Implantation.

Large device variation is a fundamental challenge for resistive random access memory (RRAM) array circuit. Improved device-to-device distributions of set and reset voltages in a SiN RRAM device is realized via arsenic ion (As) implantation. Besides, the As-implanted SiN RRAM device exhibits much tighter cycle-to-cycle distribution than the nonimplanted device.

Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer.

Implementing high-performance n- and p-type thin-film transistors (TFTs) for monolithic three-dimensional (3D) integrated circuit (IC) and low-DC-power display is crucial. To achieve these goals, a top-gate transistor is preferred to a conventional bottom-gate structure. However, achieving high-performance top-gate p-TFT with good hole field-effect mobility () and large on-current/off-current (I/I) is challenging.

High-Performance Top-Gate Thin-Film Transistor with an Ultra-Thin Channel Layer.

Metal-oxide thin-film transistors (TFTs) have been implanted for a display panel, but further mobility improvement is required for future applications. In this study, excellent performance was observed for top-gate coplanar binary SnO TFTs, with a high field-effect mobility () of 136 cm/Vs, a large on-current/off-current (I/I) of 1.5 × 10, and steep subthreshold slopes of 108 mV/dec.

High Performance All Nonmetal SiN Resistive Random Access Memory with Strong Process Dependence.

All-nonmetal resistive random access memory (RRAM) with a N-Si/SiN/P-Si structure was investigated in this study. The device performance of SiN developed using physical vapor deposition (PVD) was significantly better than that of a device fabricated using plasma-enhanced chemical vapor deposition (PECVD). The SiN RRAM device developed using PVD has a large resistance window that is larger than 10 and exhibits good endurance to 10 cycles under switching pulses of 1 μs and a retention time of 10 s at 85 °C.

All Nonmetal Resistive Random Access Memory.

Traditional Resistive Random Access Memory (RRAM) is a metal-insulator-metal (MIM) structure, in which metal oxide is usually used as an insulator. The charge transport mechanism of traditional RRAM is attributed to a metallic filament inside the RRAM. In this paper, we demonstrated a novel RRAM device with no metal inside.