Artificial synaptic devices have been extensively investigated for neuromorphic computing systems, which require synaptic behaviors mimicking the biological ones. In particular, a highly linear and symmetric weight update with a conductance (or resistance) change for potentiation and depression operation is one of the essential requirements for energy-efficient neuromorphic computing; however, it is not sufficiently met. In this study, a memristor with a Pt/p-LiCoO/p-NiO/Pt structure is investigated, where a low interface energy barrier between the Pt electrode and the NiO layer makes for a more linear and symmetric conductance change.
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