Publications by authors named "Sushant Sonde"

Article Synopsis
  • Large banks of solid-state memory are essential for data-intensive computing, and conductive-bridge random access memory (CBRAM) is a promising technology for efficient storage.
  • Traditional materials like copper (Cu) and silver (Ag) are problematic due to their fast diffusion and contamination in silicon microelectronics, prompting the search for alternatives.
  • The study identifies tin (Sn) as a viable replacement for Cu and Ag in CBRAM devices, showing through experiments that Sn-based devices can achieve rapid memory switching similar to traditional materials, while also discussing the factors influencing switching mechanisms.
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Recently, two-dimensional (2D) atomic sheets have inspired new ideas in nanoscience including topologically protected charge transport,1,2 spatially separated excitons,3 and strongly anisotropic heat transport.4 Here, we report the intriguing observation of stable nonvolatile resistance switching (NVRS) in single-layer atomic sheets sandwiched between metal electrodes. NVRS is observed in the prototypical semiconducting (MX, M = Mo, W; and X = S, Se) transitional metal dichalcogenides (TMDs),5 which alludes to the universality of this phenomenon in TMD monolayers and offers forming-free switching.

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To reduce Schottky-barrier-induced contact and access resistance, and the impact of charged impurity and phonon scattering on mobility in devices based on 2D transition metal dichalcogenides (TMDs), considerable effort has been put into exploring various doping techniques and dielectric engineering using high-κ oxides, respectively. The goal of this work is to demonstrate a high-κ dielectric that serves as an effective n-type charge transfer dopant on monolayer (ML) molybdenum disulfide (MoS2). Utilizing amorphous titanium suboxide (ATO) as the "high-κ dopant", we achieved a contact resistance of ∼180 Ω·μm that is the lowest reported value for ML MoS2.

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High-mobility two-dimensional (2D) semiconductors are desirable for high-performance mechanically flexible nanoelectronics. In this work, we report the first flexible black phosphorus (BP) field-effect transistors (FETs) with electron and hole mobilities superior to what has been previously achieved with other more studied flexible layered semiconducting transistors such as MoS2 and WSe2. Encapsulated bottom-gated BP ambipolar FETs on flexible polyimide afforded maximum carrier mobility of about 310 cm(2)/V·s with field-effect current modulation exceeding 3 orders of magnitude.

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We report the fabrication and device characteristics of exfoliated, few-layer, dual-gated ReS2 field effect transistors (FETs). The ReS2 FETs display n-type behavior with a room temperature Ion/I(off) of 10(5). Many devices were studied with a maximum intrinsic mobility of 12 cm(2) · V(-1) · s(-1) at room temperature and 26 cm(2) · V(-1) · s(-1) at 77 K.

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We fabricate and characterize a set of dual-gated graphene field effect transistors using a novel physical vapor deposition technique in which titanium is evaporated onto the graphene channel in 10 Å cycles and oxidized in ambient to form a top-gate dielectric. A combination of X-ray photoemission spectroscopy, ellipsometry, and transmission electron microscopy suggests that the titanium is oxidizing in situ to titanium dioxide. Electrical characterization of our devices yields a dielectric constant of κ = 6.

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Recently, giant carrier mobility μ (>10(5) cm(2) V(-1) s(-1)) and micrometer electron mean free path (l) have been measured in suspended graphene or in graphene encapsulated between inert and ultraflat BN layers. Much lower μ values (10000-20000 cm(2) V(-1) s(-1)) are typically reported in graphene on common substrates (SiO(2), SiC) used for device fabrication. The debate on the factors limiting graphene electron mean free path is still open with charged impurities (CI) and resonant scatterers (RS) indicated as the most probable candidates.

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In this work, we present a nanometer resolution structural characterization of epitaxial graphene (EG) layers grown on 4H-SiC (0001) 8° off-axis, by annealing in inert gas ambient (Ar) in a wide temperature range (Tgr from 1600 to 2000°C). For all the considered growth temperatures, few layers of graphene (FLG) conformally covering the 100 to 200-nm wide terraces of the SiC surface have been observed by high-resolution cross-sectional transmission electron microscopy (HR-XTEM). Tapping mode atomic force microscopy (t-AFM) showed the formation of wrinkles with approx.

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In this article, a scanning probe method based on nanoscale capacitance measurements was used to investigate the lateral homogeneity of the electron mean free path both in pristine and ion-irradiated graphene. The local variations in the electronic transport properties were explained taking into account the scattering of electrons by charged impurities and point defects (vacancies). Electron mean free path is mainly limited by charged impurities in unirradiated graphene, whereas an important role is played by lattice vacancies after irradiation.

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