Efficient, tunable flip-chip-integrated III-V/Si hybrid external-cavity laser array.

We demonstrate a surface-normal coupled tunable hybrid silicon laser array for the first time using passively-aligned, high-accuracy flip chip bonding. A 2x6 III-V reflective semiconductor optical amplifier (RSOA) array with integrated total internal reflection mirrors is bonded to a CMOS SOI chip with grating couplers and silicon ring reflectors to form a tunable hybrid external-cavity laser array. Waveguide-coupled wall plug efficiency (wcWPE) of 2% and output power of 3 mW has been achieved for all 12 lasers.

Error-free operation of a polarization-insensitive 4λ x 25 Gbps silicon photonic WDM receiver with closed-loop thermal stabilization of Si microrings.

We report the first closed-loop operation of a 100 Gbps polarization-insensitive, 4-channel wavelength-tracking WDM receiver in silicon photonics platform. Error-free operation is achieved with input polarization scrambling over input wavelength change of 4.5 nm using efficient thermal tuning of Si microring demux, corresponding to greater than 60°C fluctuation in temperature.

Microring-based multi-chip WDM photonic module.

We report on a packaged prototype of a WDM photonic transceiver. It is an all-solid state hybrid assembly based on 130nm SOI photonic circuitry integrated with a 40nm CMOS VLSI driver. Our prototype supports eight tunable WDM channels operating at 10Gb/s, each capable of both transmitting and receiving data on the same chip.

A high-speed, tunable silicon photonic ring modulator integrated with ultra-efficient active wavelength control.

We report the first complete 10G silicon photonic ring modulator with integrated ultra-efficient CMOS driver and closed-loop wavelength control. A selective substrate removal technique was used to improve the ring tuning efficiency. Limited by the thermal tuner driver output power, a maximum open-loop tuning range of about 4.

High power and widely tunable Si hybrid external-cavity laser for power efficient Si photonics WDM links.

A highly efficient silicon (Si) hybrid external cavity laser with a wavelength tunable ring reflector is fabricated on a complementary metal-oxide semiconductor (CMOS)-compatible Si-on-insulator (SOI) platform and experimental results with high output power are demonstrated. A III-V semiconductor gain chip is edge-coupled into a SOI cavity chip through a SiN(x) spot size converter and Si grating couplers are incorporated to enable wafer-scale characterization. The laser output power reaches 20 mW and the highest wall-plug efficiency of 7.

Vertical-coupled high-efficiency tunable III-V- CMOS SOI hybrid external-cavity laser.

We demonstrate a hybrid III-V/SOI laser by vertically coupling a III-V RSOA chip with a SOI-CMOS chip containing a tunable wavelength selective reflector. We report a waveguide-coupled wall-plug-efficiency of 5.5% and output power of 10 mW.

CMOS-compatible, athermal silicon ring modulators clad with titanium dioxide.

We present the design, fabrication and characterization of athermal nano-photonic silicon ring modulators. The athermalization method employs compensation of the silicon core thermo-optic contribution with that from the amorphous titanium dioxide (a-TiO(2)) overcladding with a negative thermo-optic coefficient. We developed a new CMOS-compatible fabrication process involving low temperature RF magnetron sputtering of high-density and low-loss a-TiO(2) that can withstand subsequent elevated-temperature CMOS processes.

Demonstration of free space coherent optical communication using integrated silicon photonic orbital angular momentum devices.

We propose and demonstrate silicon photonic integrated circuits (PICs) for free-space spatial-division-multiplexing (SDM) optical transmission with multiplexed orbital angular momentum (OAM) states over a topological charge range of -2 to +2. The silicon PIC fabricated using a CMOS-compatible process exploits tunable-phase arrayed waveguides with vertical grating couplers to achieve space division multiplexing and demultiplexing. The experimental results utilizing two silicon PICs achieve SDM mux/demux bit-error-rate performance for 1‑b/s/Hz, 10-Gb/s binary phase shifted keying (BPSK) data and 2-b/s/Hz, 20-Gb/s quadrature phase shifted keying (QPSK) data for individual and two simultaneous OAM states.

Full-field technique for measuring the spectral evolution of reconfigurable photonic filters.

This Letter demonstrates a measurement technique based on frequency-to-time mapping and coherent detection, which enables the complete (i.e., amplitude and phase) characterization of dynamically reconfigurable photonic filters.

Demonstration of a fast-reconfigurable silicon CMOS optical lattice filter.

We demonstrate a fully-reconfigurable fourth-order optical lattice filter built by cascading identical unit cells consisting of a Mach-Zehnder interferometer (MZI) and a ring resonator. The filter is fabricated using a commercial silicon complementary metal oxide semiconductor (CMOS) process and reconfigured by current injection into p-i-n diodes with a reconfiguration time of less than 10 ns. The experimental results show full control over the single unit cell pole and zero, switching the unit cell transfer function between a notch filter and a bandpass filter, narrowing the notch width down to 400 MHz, and tuning the center wavelength over the full free spectral range (FSR) of 10 GHz.