ACS Appl Mater Interfaces
January 2025
Multivalued logic (MVL) systems, in which data are processed with more than two logic values, are considered a viable solution for achieving superior processing efficiency with higher data density and less complicated system complexity without further scaling challenges. Such MVL systems have been conceptually realized by using negative transconductance (NTC) devices whose channels consist of van der Waals (vdW) heterojunctions of low-dimensional semiconductors; however, their circuit operations have not been quite ideal for driving multiple stages in real circuit applications due to reasons such as a reduced output swing and poorly defined logic states. Herein, we demonstrate ternary inverter circuits with near rail-to-rail swing and three distinct logic states by employing vdW p-n heterojunctions of single-walled carbon nanotubes (SWCNT) and MoS where the SWCNT layer completely covers the MoS layer.
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