Publications by authors named "Shu-Jen Han"

Precise fabrication of semiconducting carbon nanotubes (CNTs) into densely aligned evenly spaced arrays is required for ultrascaled technology nodes. We report the precise scaling of inter-CNT pitch using a supramolecular assembly method called spatially hindered integration of nanotube electronics. Specifically, by using DNA brick crystal-based nanotrenches to align DNA-wrapped CNTs through DNA hybridization, we constructed parallel CNT arrays with a uniform pitch as small as 10.

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Miniature batteries can accelerate the development of mobile electronics by providing sufficient energy to power small devices. Typical microbatteries commonly use thin-film inorganic electrodes based on Li-ion insertion reaction. However, they rely on the complicated thin-film synthesis method of inorganics containing many elements.

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In cavity quantum electrodynamics, optical emitters that are strongly coupled to cavities give rise to polaritons with characteristics of both the emitters and the cavity excitations. We show that carbon nanotubes can be crystallized into chip-scale, two-dimensionally ordered films and that this material enables intrinsically ultrastrong emitter-cavity interactions: Rather than interacting with external cavities, nanotube excitons couple to the near-infrared plasmon resonances of the nanotubes themselves. Our polycrystalline nanotube films have a hexagonal crystal structure, ∼25-nm domains, and a 1.

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Article Synopsis
  • Researchers have developed a flexible pressure sensor that behaves like human skin, focusing on key features such as mechanical flexibility and sensitivity.
  • The sensor is built on a matrix of 16 × 16 carbon nanotube transistors, offering high performance with a device yield of nearly 99% over a sizable area.
  • Operating at a low voltage of 3 V, it provides quick response times (under 30 ms) and high accuracy, potentially advancing applications in robotics and prosthetics.
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The morphology and dimension of the conductive filament formed in a memristive device are strongly influenced by the thickness of its switching medium layer. Aggressive scaling of this active layer thickness is critical toward reducing the operating current, voltage, and energy consumption in filamentary-type memristors. Previously, the thickness of this filament layer has been limited to above a few nanometers due to processing constraints, making it challenging to further suppress the on-state current and the switching voltage.

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Low-dimensional plasmonic materials can function as high quality terahertz and infrared antennas at deep subwavelength scales. Despite these antennas' strong coupling to electromagnetic fields, there is a pressing need to further strengthen their absorption. We address this problem by fabricating thick films of aligned, uniformly sized semiconducting carbon nanotubes and showing that their plasmon resonances are strong, narrow, and broadly tunable.

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High-performance logic based on carbon nanotubes (CNTs) requires high-density arrays of selectively placed semiconducting CNTs. Although polymer-wrapping methods can allow CNTs to be sorted to a >99.9% semiconducting purity, patterning these polymer-wrapped CNTs is an outstanding problem.

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Carbon nanotubes provide a rare access point into the plasmon physics of one-dimensional electronic systems. By assembling purified nanotubes into uniformly sized arrays, we show that they support coherent plasmon resonances, that these plasmons couple to nanotube and substrate phonons, and that the resulting phonon-plasmon resonances have quality factors as high as 10. Because nanotube plasmons intensely strengthen electromagnetic fields and light-matter interactions, they provide a compelling platform for surface-enhanced spectroscopy and tunable optical devices at deep-subwavelength scales.

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As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.

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The International Technology Roadmap for Semiconductors challenges the device research community to reduce the transistor footprint containing all components to 40 nanometers within the next decade. We report on a p-channel transistor scaled to such an extremely small dimension. Built on one semiconducting carbon nanotube, it occupies less than half the space of leading silicon technologies, while delivering a significantly higher pitch-normalized current density-above 0.

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Flexible and stretchable electronics are becoming increasingly important in many emerging applications. Due to the outstanding electrical properties of single crystal semiconductors, there is great interest in releasing single crystal thin films and fabricating flexible electronics with these conventionally rigid materials. In this study the authors report a universal single crystal layer release process, called "3D spalling," extending beyond prior art.

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Plasmons in graphene nanostructures show great promise for mid-infrared applications ranging from a few to tens of microns. However, mid-infrared plasmonic resonances in graphene nanostructures are usually weak and narrow-banded, limiting their potential in light manipulation and detection. Here, we investigate the coupling among graphene plasmonic nanostructures and further show that, by engineering the coupling, enhancement of light-graphene interaction strength and broadening of spectral width can be achieved simultaneously.

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Nonvolatile charge-trap memory plays an important role in many modern electronics technologies, from portable electronic systems to large-scale data centers. Conventional charge-trap memory devices typically work with fixed channel carrier polarity and device characteristics. However, many emerging applications in reconfigurable electronics and neuromorphic computing require dynamically tunable properties in their electronic device components that can lead to enhanced circuit versatility and system functionalities.

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Recently, black phosphorus (BP) has joined the two-dimensional material family as a promising candidate for photonic applications due to its moderate bandgap, high carrier mobility, and compatibility with a diverse range of substrates. Photodetectors are probably the most explored BP photonic devices, however, their unique potential compared with other layered materials in the mid-infrared wavelength range has not been revealed. Here, we demonstrate BP mid-infrared detectors at 3.

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A record high current density of 580 μA/μm is achieved for long-channel, few-layer black phosphorus transistors with scandium contacts after 400 K vacuum annealing. The annealing effectively improves the on-state current and Ion/Ioff ratio by 1 order of magnitude and the subthreshold swing by ∼2.5×, whereas Al2O3 capping significantly degrades transistor performances, resulting in 5× lower on-state current and 3× lower Ion/Ioff ratio.

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Information security underpins many aspects of modern society. However, silicon chips are vulnerable to hazards such as counterfeiting, tampering and information leakage through side-channel attacks (for example, by measuring power consumption, timing or electromagnetic radiation). Single-walled carbon nanotubes are a potential replacement for silicon as the channel material of transistors due to their superb electrical properties and intrinsic ultrathin body, but problems such as limited semiconducting purity and non-ideal assembly still need to be addressed before they can deliver high-performance electronics.

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Moving beyond the limits of silicon transistors requires both a high-performance channel and high-quality electrical contacts. Carbon nanotubes provide high-performance channels below 10 nanometers, but as with silicon, the increase in contact resistance with decreasing size becomes a major performance roadblock. We report a single-walled carbon nanotube (SWNT) transistor technology with an end-bonded contact scheme that leads to size-independent contact resistance to overcome the scaling limits of conventional side-bonded or planar contact schemes.

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We report operating temperatures and heating coefficients measured in a multilayer black phosphorus device as a function of injected electrical power. By combining micro-Raman spectroscopy and electrical transport measurements, we have observed a linear temperature increase up to 600 K at a power dissipation rate of 0.896 K μm(3)/mW.

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Ultrascaled transistors based on single-walled carbon nanotubes are identified as one of the top candidates for future microprocessor chips as they provide significantly better device performance and scaling properties than conventional silicon technologies. From the perspective of the chip performance, the device variability is as important as the device performance for practical applications. This paper presents a systematic investigation on the origins and characteristics of the threshold voltage (VT) variability of scaled quasiballistic nanotube transistors.

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Few-layer and thin film forms of layered black phosphorus (BP) have recently emerged as a promising material for applications in high performance nanoelectronics and infrared optoelectronics. Layered BP thin films offer a moderate bandgap of around 0.3 eV and high carrier mobility, which lead to transistors with decent on-off ratios and high on-state current densities.

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One key challenge of realizing practical high-performance electronic devices based on single-walled carbon nanotubes is to produce electronically pure nanotube arrays with both a minuscule and uniform inter-tube pitch for sufficient device-packing density and homogeneity. Here we develop a method in which the alternating voltage-fringing electric field formed between surface microelectrodes and the substrate is utilized to assemble semiconducting nanotubes into well-aligned, ultrahigh-density and submonolayered arrays, with a consistent pitch as small as 21±6 nm determined by a self-limiting mechanism, based on the unique field focusing and screening effects of the fringing field. Field-effect transistors based on such nanotube arrays exhibit record high device transconductance (>50 μS μm(-1)) and decent on current per nanotube (~1 μA per tube) together with high on/off ratios at a drain bias of -1 V.

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The slow-down in traditional silicon complementary metal-oxide-semiconductor (CMOS) scaling (Moore's law) has created an opportunity for a disruptive innovation to bring the semiconductor industry into a postsilicon era. Due to their ultrathin body and ballistic transport, carbon nanotubes (CNTs) have the intrinsic transport and scaling properties to usher in this new era. The remaining challenges are largely materials-related and include obtaining purity levels suitable for logic technology, placement of CNTs at very tight (∼5 nm) pitch to allow for density scaling and source/drain contact scaling.

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Thin films of carbon nanotubes (CNTs) are fabricated from solution using a one-step directed assembly strategy. Very high surface selectivity and exceptionally high CNT densities can be observed in small features with complex shapes. This directed assembly technique makes use of minimum amounts of CNTs and low toxicity solvents, and can be applied to metallic, semiconducting and mixed CNTs for fabrication of thin films over macroscopic areas.

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Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit.

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Organic light-emitting diodes are emerging as leading technologies for both high quality display and lighting. However, the transparent conductive electrode used in the current organic light-emitting diode technologies increases the overall cost and has limited bendability for future flexible applications. Here we use single-layer graphene as an alternative flexible transparent conductor, yielding white organic light-emitting diodes with brightness and efficiency sufficient for general lighting.

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