Phase-change memory via a phase-changeable self-confined nano-filament.

Phase-change memory (PCM) has been considered a promising candidate for solving von Neumann bottlenecks owing to its low latency, non-volatile memory property and high integration density. However, PCMs usually require a large current for the reset process by melting the phase-change material into an amorphous phase, which deteriorates the energy efficiency. Various studies have been conducted to reduce the operation current by minimizing the device dimensions, but this increases the fabrication cost while the reduction of the reset current is limited.

Linear conductance update improvement of CMOS-compatible second-order memristors for fast and energy-efficient training of a neural network using a memristor crossbar array.

Memristors are two-terminal memory devices that can change the conductance state and store analog values. Thanks to their simple structure, suitability for high-density integration, and non-volatile characteristics, memristors have been intensively studied as synapses in artificial neural network systems. Memristive synapses in neural networks have theoretically better energy efficiency compared with conventional von Neumann computing processors.

Recent Advances and Future Prospects for Memristive Materials, Devices, and Systems.

Memristive technology has been rapidly emerging as a potential alternative to traditional CMOS technology, which is facing fundamental limitations in its development. Since oxide-based resistive switches were demonstrated as memristors in 2008, memristive devices have garnered significant attention due to their biomimetic memory properties, which promise to significantly improve power consumption in computing applications. Here, we provide a comprehensive overview of recent advances in memristive technology, including memristive devices, theory, algorithms, architectures, and systems.

Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy-Efficient Neuromorphic Hardware.

A memristive crossbar array (MCA) is an ideal platform for emerging memory and neuromorphic hardware due to its high bitwise density capability. A charge trap memristor (CTM) is an attractive candidate for the memristor cell of the MCA, because the embodied rectifying characteristic frees it from the sneak current issue. Although the potential of the CTM devices has been suggested, their practical viability needs to be further proved.

The gate injection-based field-effect synapse transistor with linear conductance update for online training.

Neuromorphic computing, an alternative for von Neumann architecture, requires synapse devices where the data can be stored and computed in the same place. The three-terminal synapse device is attractive for neuromorphic computing due to its high stability and controllability. However, high nonlinearity on weight update, low dynamic range, and incompatibility with conventional CMOS systems have been reported as obstacles for large-scale crossbar arrays.

Experimental demonstration of highly reliable dynamic memristor for artificial neuron and neuromorphic computing.

Neuromorphic computing, a computing paradigm inspired by the human brain, enables energy-efficient and fast artificial neural networks. To process information, neuromorphic computing directly mimics the operation of biological neurons in a human brain. To effectively imitate biological neurons with electrical devices, memristor-based artificial neurons attract attention because of their simple structure, energy efficiency, and excellent scalability.

Heterogeneous and Monolithic 3D Integration of III-V-Based Radio Frequency Devices on Si CMOS Circuits.

Next-generation wireless communication such as sixth-generation (6G) and beyond is expected to require high-frequency, multifunctionality, and power-efficiency systems. A III-V compound semiconductor is a promising technology for high-frequency applications, and a Si complementary metal-oxide-semiconductor (CMOS) is the never-beaten technology for highly integrated digital circuits. To harness the advantages of these two technologies, monolithic integration of III-V and Si electronics is beneficial, so that there have been everlasting efforts to accomplish the monolithic integration.

Reliable multilevel memristive neuromorphic devices based on amorphous matrix via quasi-1D filament confinement and buffer layer.

Conductive-bridging random access memory (CBRAM) has garnered attention as a building block of non-von Neumann architectures because of scalability and parallel processing on the crossbar array. To integrate CBRAM into the back-end-of-line (BEOL) process, amorphous switching materials have been investigated for practical usage. However, both the inherent randomness of filaments and disorders of amorphous material lead to poor reliability.

Nonvolatile and Neuromorphic Memory Devices Using Interfacial Traps in Two-Dimensional WSe/MoTe Stack Channel.

Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe and MoTe flakes are vertically stacked on the gate dielectric, and bottom MoTe performs as a channel for hole transport.

Conductive-bridging random-access memories for emerging neuromorphic computing.

With the increasing utilisation of artificial intelligence, there is a renewed demand for the development of novel neuromorphic computing owing to the drawbacks of the existing computing paradigm based on the von Neumann architecture. Extensive studies have been performed on memristors as their electrical nature is similar to those of biological synapses and neurons. However, most hardware-based artificial neural networks (ANNs) have been developed with oxide-based memristors owing to their high compatibility with mature complementary metal-oxide-semiconductor (CMOS) processes.

SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations.

Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on-formation of filaments in an amorphous medium-is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium.

Experimental Demonstration of Feature Extraction and Dimensionality Reduction Using Memristor Networks.

Memristors have been considered as a leading candidate for a number of critical applications ranging from nonvolatile memory to non-Von Neumann computing systems. Feature extraction, which aims to transform input data from a high-dimensional space to a space with fewer dimensions, is an important technique widely used in machine learning and pattern recognition applications. Here, we experimentally demonstrate that memristor arrays can be used to perform principal component analysis, one of the most commonly used feature extraction techniques, through online, unsupervised learning.

Remote epitaxy through graphene enables two-dimensional material-based layer transfer.

Epitaxy-the growth of a crystalline material on a substrate-is crucial for the semiconductor industry, but is often limited by the need for lattice matching between the two material systems. This strict requirement is relaxed for van der Waals epitaxy, in which epitaxy on layered or two-dimensional (2D) materials is mediated by weak van der Waals interactions, and which also allows facile layer release from 2D surfaces. It has been thought that 2D materials are the only seed layers for van der Waals epitaxy.

Data Clustering using Memristor Networks.

Memristors have emerged as a promising candidate for critical applications such as non-volatile memory as well as non-Von Neumann computing architectures based on neuromorphic and machine learning systems. In this study, we demonstrate that memristors can be used to perform principal component analysis (PCA), an important technique for machine learning and data feature learning. The conductance changes of memristors in response to voltage pulses are studied and modeled with an internal state variable to trace the analog behavior of the device.

Experimental demonstration of a second-order memristor and its ability to biorealistically implement synaptic plasticity.

Memristors have been extensively studied for data storage and low-power computation applications. In this study, we show that memristors offer more than simple resistance change. Specifically, the dynamic evolutions of internal state variables allow an oxide-based memristor to exhibit Ca(2+)-like dynamics that natively encode timing information and regulate synaptic weights.

Tuning resistive switching characteristics of tantalum oxide memristors through Si doping.

An oxide memristor device changes its internal state according to the history of the applied voltage and current. The principle of resistive switching (RS) is based on ion transport (e.g.

Electrochemical dynamics of nanoscale metallic inclusions in dielectrics.

Nanoscale metal inclusions in or on solid-state dielectrics are an integral part of modern electrocatalysis, optoelectronics, capacitors, metamaterials and memory devices. The properties of these composite systems strongly depend on the size, dispersion of the inclusions and their chemical stability, and are usually considered constant. Here we demonstrate that nanoscale inclusions (for example, clusters) in dielectrics dynamically change their shape, size and position upon applied electric field.

Comprehensive physical model of dynamic resistive switching in an oxide memristor.

Memristors have been proposed for a number of applications from nonvolatile memory to neuromorphic systems. Unlike conventional devices based solely on electron transport, memristors operate on the principle of resistive switching (RS) based on redistribution of ions. To date, a number of experimental and modeling studies have been reported to probe the RS mechanism; however, a complete physical picture that can quantitatively describe the dynamic RS behavior is still missing.

Random telegraph noise and resistance switching analysis of oxide based resistive memory.

Resistive random access memory (RRAM) devices (e.g."memristors") are widely believed to be a promising candidate for future memory and logic applications.

Oxide heterostructure resistive memory.

Resistive switching devices are widely believed as a promising candidate for future memory and logic applications. Here we show that by using multilayer oxide heterostructures the switching characteristics can be systematically controlled, ranging from unipolar switching to complementary switching and bipolar switching with linear and nonlinear on-states and high endurance. Each layer can be tailed for a specific function during resistance switching, thus greatly improving the degree of control and flexibility for optimized device performance.

Stochastic memristive devices for computing and neuromorphic applications.

Nanoscale resistive switching devices (memristive devices or memristors) have been studied for a number of applications ranging from non-volatile memory, logic to neuromorphic systems. However a major challenge is to address the potentially large variations in space and time in these nanoscale devices. Here we show that in metal-filament based memristive devices the switching can be fully stochastic.