Solution-Based Fabrication of Polycrystalline Si Thin-Film Transistors from Recycled Polysilanes.

Currently, research has been focusing on printing and laser crystallization of cyclosilanes, bringing to life polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with outstanding properties. However, the synthesis of these Si-based inks is generally complex and expensive. Here, we prove that a polysilane ink, obtained as a byproduct of silicon gases and derivatives, can be used successfully for the synthesis of poly-Si by laser annealing, at room temperature, and for n- and p-channel TFTs.

Flexible ultrathin-body single-photon avalanche diode sensors and CMOS integration.

We proposed the world's first flexible ultrathin-body single-photon avalanche diode (SPAD) as photon counting device providing a suitable solution to advanced implantable bio-compatible chronic medical monitoring, diagnostics and other applications. In this paper, we investigate the Geiger-mode performance of this flexible ultrathin-body SPAD comprehensively and we extend this work to the first flexible SPAD image sensor with in-pixel and off-pixel electronics integrated in CMOS. Experimental results show that dark count rate (DCR) by band-to-band tunneling can be reduced by optimizing multiplication doping.

Fabrication of Low Temperature Carbon Nanotube Vertical Interconnects Compatible with Semiconductor Technology.

We demonstrate a method for the low temperature growth (350 °C) of vertically-aligned carbon nanotubes (CNT) bundles on electrically conductive thin-films. Due to the low growth temperature, the process allows integration with modern low-κ dielectrics and some flexible substrates. The process is compatible with standard semiconductor fabrication, and a method for the fabrication of electrical 4-point probe test structures for vertical interconnect test structures is presented.

Impact of the atomic layer deposition precursors diffusion on solid-state carbon nanotube based supercapacitors performances.

A study on the impact of atomic layer deposition (ALD) precursors diffusion on the performance of solid-state miniaturized nanostructure capacitor array is presented. Three-dimensional nanostructured capacitor array based on double conformal coating of multiwalled carbon nanotubes (MWCNTs) bundles is realized using ALD to deposit Al2O3 as dielectric layer and TiN as high aspect-ratio conformal counter-electrode on 2 μm long MWCNT bundles. The devices have a small footprint (from 100 μm(2) to 2500 μm(2)) and are realized using an IC wafer-scale manufacturing process with high reproducibility (≤0.