4H-SiC MOSFET Threshold Voltage Instability Evaluated via Pulsed High-Temperature Reverse Bias and Negative Gate Bias Stresses.

This paper presents a reliability study of a conventional 650 V SiC planar MOSFET subjected to pulsed HTRB (High-Temperature Reverse Bias) stress and negative HTGB (High-Temperature Gate Bias) stress defined by a TCAD static simulation showing the electric field distribution across the SiC/SiO interface. The instability of several electrical parameters was monitored and their drift analyses were investigated. Moreover, the shift of the onset of the Fowler-Nordheim gate injection current under stress conditions provided a reliable method to quantify the trapped charge inside the gate oxide bulk, and it allowed us to determine the real stress conditions.

Interface Properties of MoS van der Waals Heterojunctions with GaN.

The combination of the unique physical properties of molybdenum disulfide (MoS) with those of gallium nitride (GaN) and related group-III nitride semiconductors have recently attracted increasing scientific interest for the realization of innovative electronic and optoelectronic devices. A deep understanding of MoS/GaN interface properties represents the key to properly tailor the electronic and optical behavior of devices based on this heterostructure. In this study, monolayer (1L) MoS was grown on GaN-on-sapphire substrates by chemical vapor deposition (CVD) at 700 °C.

Large-Area MoS Films Grown on Sapphire and GaN Substrates by Pulsed Laser Deposition.

In this paper, we present the preparation of few-layer MoS films on single-crystal sapphire, as well as on heteroepitaxial GaN templates on sapphire substrates, using the pulsed laser deposition (PLD) technique. Detailed structural and chemical characterization of the films were performed using Raman spectroscopy, X-ray photoelectron spectroscopy, X-ray diffraction measurements, and high-resolution transmission electron microscopy. According to X-ray diffraction studies, the films exhibit epitaxial growth, indicating a good in-plane alignment.

AlO Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices.

Metal-oxide-semiconductor (MOS) capacitors with AlO as a gate insulator are fabricated on cubic silicon carbide (3C-SiC). AlO is deposited both by thermal and plasma-enhanced Atomic Layer Deposition (ALD) on a thermally grown 5 nm SiO interlayer to improve the ALD nucleation and guarantee a better band offset with the SiC. The deposited AlO/SiO stacks show lower negative shifts of the flat band voltage V (in the range of about -3 V) compared with the conventional single SiO layer (in the range of -9 V).

A Low Temperature Growth of CuO Thin Films as Hole Transporting Material for Perovskite Solar Cells.

Copper oxide thin films have been successfully synthesized through a metal-organic chemical vapor deposition (MOCVD) approach starting from the copper bis(2,2,6,6-tetramethyl-3,5-heptanedionate), Cu(tmhd), complex. Operative conditions of fabrication strongly affect both the composition and morphologies of the copper oxide thin films. The deposition temperature has been accurately monitored in order to stabilize and to produce, selectively and reproducibly, the two phases of cuprite CuO and/or tenorite CuO.

Structural and Insulating Behaviour of High-Permittivity Binary Oxide Thin Films for Silicon Carbide and Gallium Nitride Electronic Devices.

High-κ dielectrics are insulating materials with higher permittivity than silicon dioxide. These materials have already found application in microelectronics, mainly as gate insulators or passivating layers for silicon (Si) technology. However, since the last decade, the post-Si era began with the pervasive introduction of wide band gap (WBG) semiconductors, such as silicon carbide (SiC) and gallium nitride (GaN), which opened new perspectives for high-κ materials in these emerging technologies.

Multiscale Investigation of the Structural, Electrical and Photoluminescence Properties of MoS Obtained by MoO Sulfurization.

In this paper, we report a multiscale investigation of the compositional, morphological, structural, electrical, and optical emission properties of 2H-MoS obtained by sulfurization at 800 °C of very thin MoO films (with thickness ranging from ~2.8 nm to ~4.2 nm) on a SiO/Si substrate.

Materials and Processes for Schottky Contacts on Silicon Carbide.

Silicon carbide (4H-SiC) Schottky diodes have reached a mature level of technology and are today essential elements in many applications of power electronics. In this context, the study of Schottky barriers on 4H-SiC is of primary importance, since a deeper understanding of the metal/4H-SiC interface is the prerequisite to improving the electrical properties of these devices. To this aim, over the last three decades, many efforts have been devoted to developing the technology for 4H-SiC-based Schottky diodes.

Status and Prospects of Cubic Silicon Carbide Power Electronics Device Technology.

Wide bandgap (WBG) semiconductors are becoming more widely accepted for use in power electronics due to their superior electrical energy efficiencies and improved power densities. Although WBG cubic silicon carbide (3C-SiC) displays a modest bandgap compared to its commercial counterparts (4H-silicon carbide and gallium nitride), this material has excellent attributes as the WBG semiconductor of choice for low-resistance, reliable diode and MOS devices. At present the material remains firmly in the research domain due to numerous technological impediments that hamper its widespread adoption.

High-Resolution Two-Dimensional Imaging of the 4H-SiC MOSFET Channel by Scanning Capacitance Microscopy.

In this paper, a two-dimensional (2D) planar scanning capacitance microscopy (SCM) method is used to visualize with a high spatial resolution the channel region of large-area 4H-SiC power MOSFETs and estimate the homogeneity of the channel length over the whole device perimeter. The method enabled visualizing the fluctuations of the channel geometry occurring under different processing conditions. Moreover, the impact of the ion implantation parameters on the channel could be elucidated.

Nanoscale structural and electrical properties of graphene grown on AlGaN by catalyst-free chemical vapor deposition.

The integration of graphene (Gr) with nitride semiconductors is highly interesting for applications in high-power/high-frequency electronics and optoelectronics. In this work, we demonstrated the direct growth of Gr on AlGaN/sapphire templates by propane (CH) chemical vapor deposition at a temperature of 1350 °C. After optimization of the CH flow rate, a uniform and conformal Gr coverage was achieved, which proved beneficial to prevent degradation of AlGaN morphology.

Conductive Atomic Force Microscopy of Semiconducting Transition Metal Dichalcogenides and Heterostructures.

Semiconducting transition metal dichalcogenides (TMDs) are promising materials for future electronic and optoelectronic applications. However, their electronic properties are strongly affected by peculiar nanoscale defects/inhomogeneities (point or complex defects, thickness fluctuations, grain boundaries, etc.), which are intrinsic of these materials or introduced during device fabrication processes.

Understanding the role of threading dislocations on 4H-SiC MOSFET breakdown under high temperature reverse bias stress.

The origin of dielectric breakdown was studied on 4H-SiC MOSFETs that failed after three months of high temperature reverse bias stress. A local inspection of the failed devices demonstrated the presence of a threading dislocation (TD) at the breakdown location. The nanoscale origin of the dielectric breakdown was highlighted with advanced high-spatial-resolution scanning probe microscopy (SPM) techniques.

An Overview of Normally-Off GaN-Based High Electron Mobility Transistors.

Today, the introduction of wide band gap (WBG) semiconductors in power electronics has become mandatory to improve the energy efficiency of devices and modules and to reduce the overall electric power consumption in the world. Due to its excellent properties, gallium nitride (GaN) and related alloys (e.g.

Electron trapping at SiO/4H-SiC interface probed by transient capacitance measurements and atomic resolution chemical analysis.

Studying the electrical and structural properties of the interface of the gate oxide (SiO) with silicon carbide (4H-SiC) is a fundamental topic, with important implications for understanding and optimising the performances of metal-oxide-semiconductor field effect transistor (MOSFETs). In this paper, near interface oxide traps (NIOTs) in lateral 4H-SiC MOSFETs were investigated combining transient gate capacitance measurements (C-t) and state of the art scanning transmission electron microscopy in electron energy loss spectroscopy (STEM-EELS) with sub-nm resolution. The C-t measurements as a function of temperature indicated that the effective NIOTs discharge time is temperature independent and electrons from NIOTs are emitted toward the semiconductor via-tunnelling.

Conduction Mechanisms at Interface of AlN/SiN Dielectric Stacks with AlGaN/GaN Heterostructures for Normally-off High Electron Mobility Transistors: Correlating Device Behavior with Nanoscale Interfaces Properties.

In this work, the conduction mechanisms at the interface of AlN/SiN dielectric stacks with AlGaN/GaN heterostructures have been studied combining different macroscopic and nanoscale characterizations on bare materials and devices. The AlN/SiN stacks grown on the recessed region of AlGaN/GaN heterostructures have been used as gate dielectric of hybrid metal-insulator-semiconductor high electron mobility transistors (MISHEMTs), showing a normally-off behavior (V = +1.2 V), high channel mobility (204 cm V s), and very good switching behavior (I/I current ratio of (5-6) × 10 and subthreshold swing of 90 mV/dec).

Ambipolar MoS Transistors by Nanoscale Tailoring of Schottky Barrier Using Oxygen Plasma Functionalization.

One of the main challenges to exploit molybdenum disulfide (MoS) potentialities for the next-generation complementary metal oxide semiconductor (CMOS) technology is the realization of p-type or ambipolar field-effect transistors (FETs). Hole transport in MoS FETs is typically hampered by the high Schottky barrier height (SBH) for holes at source/drain contacts, due to the Fermi level pinning close to the conduction band. In this work, we show that the SBH of multilayer MoS surface can be tailored at nanoscale using soft O plasma treatments.

Advances in the fabrication of graphene transistors on flexible substrates.

Graphene is an ideal candidate for next generation applications as a transparent electrode for electronics on plastic due to its flexibility and the conservation of electrical properties upon deformation. More importantly, its field-effect tunable carrier density, high mobility and saturation velocity make it an appealing choice as a channel material for field-effect transistors (FETs) for several potential applications. As an example, properly designed and scaled graphene FETs (Gr-FETs) can be used for flexible high frequency (RF) electronics or for high sensitivity chemical sensors.

In-situ monitoring by Raman spectroscopy of the thermal doping of graphene and MoS in O-controlled atmosphere.

The effects of temperature and atmosphere (air and O) on the doping of monolayers of graphene (Gr) on SiO and Si substrates, and on the doping of MoS multilayer flakes transferred on the same substrates have been investigated. The investigations were carried out by in situ micro-Raman spectroscopy during thermal treatments up to 430 °C, and by atomic force microscopy (AFM). The spectral positions of the G and 2D Raman bands of Gr undergo only minor changes during treatment, while their amplitude and full width at half maximum (FWHM) vary as a function of the temperature and the used atmosphere.

Impact of contact resistance on the electrical properties of MoS transistors at practical operating temperatures.

Molybdenum disulphide (MoS) is currently regarded as a promising material for the next generation of electronic and optoelectronic devices. However, several issues need to be addressed to fully exploit its potential for field effect transistor (FET) applications. In this context, the contact resistance, , associated with the Schottky barrier between source/drain metals and MoS currently represents one of the main limiting factors for suitable device performance.