Publications by authors named "Rajeswar Panja"

Formation-free multi-level resistive switching characteristics by using 10 nm-thick polycrystalline GeO film in a simple W/GeO/W structure and understanding of switching mechanism through redox reaction in HO/sarcosine sensing (or changing Ge°/Ge oxidation states under external bias) have been reported for the first time. Oxidation states of Ge/Ge are confirmed by both XPS and HO sensing of GeO membrane in electrolyte-insulator-semiconductor structure. Highly repeatable 1000 dc cycles and stable program/erase (P/E) endurance of >10 cycles at a small pulse width of 100 ns are achieved at a low operation current of 0.

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Impact of the device size and thickness of Al2O3 film on the Cu pillars and resistive switching memory characteristics of the Al/Cu/Al2O3/TiN structures have been investigated for the first time. The memory device size and thickness of Al2O3 of 18 nm are observed by transmission electron microscope image. The 20-nm-thick Al2O3 films have been used for the Cu pillar formation (i.

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The performances of conductive-bridging random access memory (CBRAM) have been reviewed for different switching materials such as chalcogenides, oxides, and bilayers in different structures. The structure consists of an inert electrode and one oxidized electrode of copper (Cu) or silver (Ag). The switching mechanism is the formation/dissolution of a metallic filament in the switching materials under external bias.

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A novel idea by using copper (Cu) pillar is proposed in this study, which can replace the through-silicon-vias (TSV) technique in future three-dimensional (3D) architecture. The Cu pillar formation under external bias in an Al/Cu/Al2O3/TiN structure is simple and low cost. The Cu pillar is formed in the Al2O3 film under a small operation voltage of <5 V and a high-current-carrying conductor of >70 mA is obtained.

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