Wafer-scale platform for on-chip 3D radio frequency lumped passive components using metal self-rolled-up membrane technique.

A wafer-scale metal self-rolled-up membrane platform has been proposed for the design and fabrication of radio-frequency on-chip lumped passive components, which is demonstrated on a commercial 4-inch sapphire batch fabrication line. Compared to the traditional methodology including planar or SiN based self-rolled-up membrane processing technologies to obtain the most basic passive lumped components, such as inductors and capacitors on the chip, this platform enables more compact three-dimensional construction of the component device structure with higher electrical performance. For demonstration, batches of wafer-scale RF inductors and capacitors are fabricated through precise design based on electromagnetic analysis.

Double Metal Dots Configuration for Suppression of Spurious Responses in Temperature Compensated Surface Acoustic Wave Resonators on SiO/LiNbO Structure.

This paper proposes a double metal dots interdigital transducer (IDT) configuration for suppression of spurious responses in temperature compensated surface acoustic wave (SAW) resonators employing the SiO/LiNbO structure. The proposed IDT configuration includes primary metal dots at the edges of the IDT aperture region, and additionally, secondary metal dots placed near the bus-bars with addition of short dummy electrodes. This double metal dots IDT configuration enables us to effectively suppress two kinds of spurious resonances: the transverse resonances that are common and the ones that are predominantly excited in the gap regions between IDT finger edges and busbars.