Publications by authors named "Pumiao Yan"
Article Synopsis
- - This paper introduces a neural recording integrated circuit (IC) designed for brain-computer interfaces, allowing for high-bandwidth and single-cell resolution data compression during digitization to manage large amounts of data more efficiently.
- - The IC reduces the output data rate by 146× by eliminating unnecessary baseline samples while still enabling the reconstruction of important neural signals, using a low-power design and an effective routing system.
- - Fabricated in a compact 28-nm CMOS process, the IC features a 32 x 32 array with 1024 channels, achieving high energy efficiency and low noise levels, making it suitable for integration with high-density microelectrode arrays.
Data Compression Versus Signal Fidelity Tradeoff in Wired-OR Analog-to-Digital Compressive Arrays for Neural Recording.
IEEE Trans Biomed Circuits Syst
August 2023
Article Synopsis
- Future neural interfaces capable of recording thousands of neurons can enhance our understanding and restoration of neural functions, but face challenges in data management and power consumption.
- The wired-OR compressive readout architecture helps tackle the overwhelming data volume by employing lossy compression at the analog-to-digital conversion stage, allowing for effective spike detection and waveform estimation.
- Tests on macaque retina recordings show that wired-OR can achieve over 50× compression while accurately detecting spikes, and when combined with a lossless compressor, can reach up to 1000× compression.