We demonstrate the p-type doping of Ge nanowires (NWs) and p-n junction arrays in a scalable vertically aligned structure with all processing performed below 400 °C. These structures are advantageous for the large scale production of parallel arrays of devices for nanoelectronics and sensing applications. Efficient methods for the oxide encapsulation, chemical mechanical polishing and cleaning of vertical Ge NWs embedded in silicon dioxide are reported.
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