Publications by authors named "Payman Zarkesh-Ha"

A comprehensive analysis and simulation of two memristor-based neuromorphic architectures for nuclear radiation detection is presented. Both scalable architectures retrofit a locally competitive algorithm to solve overcomplete sparse approximation problems by harnessing memristor crossbar execution of vector-matrix multiplications. The proposed systems demonstrate excellent accuracy and throughput while consuming minimal energy for radionuclide detection.

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Images produced by CMOS sensors may contain defective pixels due to noise, manufacturing errors, or device malfunction, which must be detected and corrected at early processing stages in order to produce images that are useful to human users and image-processing or machine-vision algorithms. This paper proposes a defective pixel detection and correction algorithm and its implementation using CMOS analog circuits, which are integrated with the image sensor at the pixel and column levels. During photocurrent integration, the circuit detects defective values in parallel at each pixel using simple arithmetic operations within a neighborhood.

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An integrable on-chip spectrometer, based on a transversely-chirped-grating waveguide-coupler for the 400- to 700-nm visible spectral range is demonstrated. For a fixed angle of incidence, the coupling wavelength is dependent on the local grating period and the waveguide structure. The transversely-chirped-input grating is fabricated on a SiO-SiN-SiO waveguide atop a Si substrate by interferometric lithography in two sections on a single silicon substrate.

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Object location is a crucial computer vision method often used as a previous stage to object classification. Object-location algorithms require high computational and memory resources, which poses a difficult challenge for portable and low-power devices, even when the algorithm is implemented using dedicated digital hardware. Moving part of the computation to the imager may reduce the memory requirements of the digital post-processor and exploit the parallelism available in the algorithm.

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In this paper, we present the architecture of a smart imaging sensor (SIS) for face recognition, based on a custom-design smart pixel capable of computing local spatial gradients in the analog domain, and a digital coprocessor that performs image classification. The SIS uses spatial gradients to compute a lightweight version of local binary patterns (LBP), which we term ringed LBP (RLBP). Our face recognition method, which is based on Ahonen's algorithm, operates in three stages: (1) it extracts local image features using RLBP, (2) it computes a feature vector using RLBP histograms, (3) it projects the vector onto a subspace that maximizes class separation and classifies the image using a nearest neighbor criterion.

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We demonstrate an on-chip spectrometer readily integrable with CMOS electronics. The structure is comprised of a SiO/SiN/SiO waveguide atop a silicon substrate. A transversely chirped grating is fabricated, in a single-step optical lithography process, on a portion of the waveguide to provide angle and wavelength dependent coupling to the guided mode.

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A hardware implementation of a real-time compressed-domain image acquisition system is demonstrated. The system performs front-end computational imaging, whereby the inner product between an image and an arbitrarily-specified mask is implemented in silicon. The acquisition system is based on an intelligent readout integrated circuit (iROIC) that is capable of providing independent bias voltages to individual detectors, which enables implementation of spatial multiplication with any prescribed mask through a bias-controlled response-modulation mechanism.

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Avalanche photodiodes (APDs) are the preferred photodetectors for direct-detection, high data-rate long-haul optical telecommunications. APDs can detect low-level optical signals due to their internal amplification of the photon-generated electrical current, which is attributable to the avalanche of electron and hole impact ionizations. Despite recent advances in APDs aimed at reducing the average avalanche-buildup time, which causes intersymbol interference and compromises receiver sensitivity at high data rates, operable speeds of commercially available APDs have been limited to 10Gbps.

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LED lighting systems with large color gamuts, with multiple LEDs spanning the visible spectrum, offer the potential of increased lighting efficiency, improved human health and productivity, and visible light communications addressing the explosive growth in wireless communications. The control of this "smart lighting system" requires a silicon-integrated-circuit-compatible, visible, plenoptic (angle and wavelength) detector. A detector element, based on an offset-grating-coupled dielectric waveguide structure and a silicon photodetector, is demonstrated with an angular resolution of less than 1° and a wavelength resolution of less than 5 nm.

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In a recently demonstrated algorithmic spectral-tuning technique by Jang et al. [Opt. Express 19, 19454-19472, (2011)], the reconstruction of an object's emissivity at an arbitrarily specified spectral window of interest in the long-wave infrared region was achieved.

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While quantum dots-in-a-well (DWELL) infrared photodetectors have the feature that their spectral responses can be shifted continuously by varying the applied bias, the width of the spectral response at any applied bias is not sufficiently narrow for use in multispectral sensing without the aid of spectral filters. To achieve higher spectral resolutions without using physical spectral filters, algorithms have been developed for post-processing the DWELL's bias-dependent photocurrents resulting from probing an object of interest repeatedly over a wide range of applied biases. At the heart of these algorithms is the ability to approximate an arbitrary spectral filter, which we desire the DWELL-algorithm combination to mimic, by forming a weighted superposition of the DWELL's non-orthogonal spectral responses over a range of applied biases.

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