Intermittent-Aware Design Exploration of Systolic Array Using Various Non-Volatile Memory: A Comparative Study.

This paper conducts a comprehensive study on intermittent computing within IoT environments, emphasizing the interplay between different dataflows-row, weight, and output-and a variety of non-volatile memory technologies. We then delve into the architectural optimization of these systems using a spatial architecture, namely IDEA, with their processing elements efficiently arranged in a rhythmic pattern, providing enhanced performance in the presence of power failures. This exploration aims to highlight the diverse advantages and potential applications of each combination, offering a comparative perspective.