Modification and Characterization of Interfacial Bonding for Thermal Management of Ruthenium Interconnects in Next-Generation Very-Large-Scale Integration Circuits.

Ruthenium may replace copper interconnects in next-generation very-large-scale integration (VLSI) circuits. However, interfacial bonding between Ru interconnect wires and surrounding dielectrics must be optimized to reduce thermal boundary resistance (TBR) for thermal management. In this study, various adhesion layers are employed to modify bonding at the Ru/SiO interface.

Control of anisotropic conduction of carbon nanotube sheets and their use as planar-type thermoelectric conversion materials.

The large anisotropic thermal conduction of a carbon nanotube (CNT) sheet that originates from the in-plane orientation of one-dimensional CNTs is disadvantageous for thermoelectric conversion using the Seebeck effect since the temperature gradient is difficult to maintain in the current flow direction. To control the orientation of the CNTs, polymer particles are introduced as orientation aligners upon sheet formation by vacuum filtration. The thermal conductivities in the in-plane direction decrease as the number of polymer particles in the sheet increases, while that in the through-plane direction increases.

Effect of the Thermal Boundary Resistance in Metal/Dielectric Thermally Conductive Layers on Power Generation of Silicon Nanowire Microthermoelectric Generators.

In microthermoelectric generators (μTEGs), parasitic thermal resistance must be suppressed to increase the temperature difference across thermocouples for optimum power generation. A thermally conductive (TC) layer is typically used in μTEGs to guide the heat flow from the heat source to the hot junction of each thermocouple. In this study, we investigate the effect of the thermal boundary resistance (TBR) in metal/dielectric TC layers on the power generation of silicon nanowire (SiNW) μTEGs.

Effect of Thermal Boundary Resistance between the Interconnect Metal and Dielectric Interlayer on Temperature Increase of Interconnects in Deeply Scaled VLSI.

Temperature increase in the continuously narrowing interconnects accelerates the performance and reliability degradation of very large scale integration (VLSI). Thermal boundary resistance (TBR) between an interconnect metal and dielectric interlayer has been neglected or treated approximately in conventional thermal analyses, resulting in significant uncertainties in performance and reliability. In this study, we investigated the effects of TBR between an interconnect metal and dielectric interlayer on temperature increase of Cu, Co, and Ru interconnects in deeply scaled VLSI.

Miniaturized planar Si-nanowire micro-thermoelectric generator using exuded thermal field for power generation.

For harvesting energy from waste heat, the power generation densities and fabrication costs of thermoelectric generators (TEGs) are considered more important than their conversion efficiency because waste heat energy is essentially obtained free of charge. In this study, we propose a miniaturized planar Si-nanowire micro-thermoelectric generator (SiNW-μTEG) architecture, which could be simply fabricated using the complementary metal-oxide-semiconductor-compatible process. Compared with the conventional nanowire μTEGs, this SiNW-μTEG features the use of an exuded thermal field for power generation.

Probing spatial heterogeneity in silicon thin films by Raman spectroscopy.

Raman spectroscopy is a powerful technique for revealing spatial heterogeneity in solid-state structures but heretofore has not been able to measure spectra from multiple positions on a sample within a short time. Here, we report a novel Raman spectroscopy approach to study the spatial heterogeneity in thermally annealed amorphous silicon (a-Si) thin films. Raman spectroscopy employs both a galvano-mirror and a two-dimensional charge-coupled device detector system, which can measure spectra at 200 nm intervals at every position along a sample in a short time.