Contact resistance is a multifaceted challenge faced by the 2D materials community. Large Schottky barrier heights and gap-state pinning are active obstacles that require an integrated approach to achieve the development of high-performance electronic devices based on 2D materials. In this work, we present semiconducting PtSe field effect transistors with all-van-der-Waals electrode and dielectric interfaces.
View Article and Find Full Text PDFSilicon nitride films are widely used as the charge storage layer of charge trap flash (CTF) devices due to their high charge trap densities. The nature of the charge trapping sites in these materials responsible for the memory effect in CTF devices is still unclear. Most prominently, the Si dangling bond or -center has been identified as an amphoteric trap center.
View Article and Find Full Text PDFElectronic devices based on two-dimensional semiconductors suffer from limited electrical stability because charge carriers originating from the semiconductors interact with defects in the surrounding insulators. In field-effect transistors, the resulting trapped charges can lead to large hysteresis and device drifts, particularly when common amorphous gate oxides (such as silicon or hafnium dioxide) are used, hindering stable circuit operation. Here, we show that device stability in graphene-based field-effect transistors with amorphous gate oxides can be improved by Fermi-level tuning.
View Article and Find Full Text PDFWithin the last decade, considerable efforts have been devoted to fabricating transistors utilizing 2D semiconductors. Also, small circuits consisting of a few transistors have been demonstrated, including inverters, ring oscillators, and static random access memory cells. However, for industrial applications, both time-zero and time-dependent variability in the performance of the transistors appear critical.
View Article and Find Full Text PDFMicromachines (Basel)
July 2020
To analyze the reliability of semiconductor transistors, changes in the performance of the devices during operation are evaluated. A prominent effect altering the device behavior are the so called bias temperature instabilities (BTI), which emerge as a drift of the device threshold voltage over time. With ongoing miniaturization of the transistors towards a few tens of nanometer small devices the drift of the threshold voltage is observed to proceed in discrete steps.
View Article and Find Full Text PDFMicromachines (Basel)
April 2020
Miniaturization of metal-oxide-semiconductor field effect transistors (MOSFETs) is typically beneficial for their operating characteristics, such as switching speed and power consumption, but at the same time miniaturization also leads to increased variability among nominally identical devices. Adverse effects due to oxide traps in particular become a serious issue for device performance and reliability. While the average number of defects per device is lower for scaled devices, the impact of the oxide defects is significantly more pronounced than in large area transistors.
View Article and Find Full Text PDFMoS has received a lot of attention lately as a semiconducting channel material for electronic devices, in part due to its large band gap as compared to that of other 2D materials. Yet, the performance and reliability of these devices are still severely limited by defects which act as traps for charge carriers, causing severely reduced mobilities, hysteresis, and long-term drift. Despite their importance, these defects are only poorly understood.
View Article and Find Full Text PDFBlack phosphorus has been recently suggested as a very promising material for use in 2D field-effect transistors. However, due to its poor stability under ambient conditions, this material has not yet received as much attention as for instance MoS. We show that the recently demonstrated AlO encapsulation leads to highly stable devices.
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