Sensitive dispersive readouts of single-electron devices ("gate reflectometry") rely on one-port radio-frequency (RF) reflectometry to read out the state of the sensor. A standard practice in reflectometry measurements is to design an impedance transformer to match the impedance of the load to the characteristic impedance of the transmission line and thus obtain the best sensitivity and signal-to-noise ratio. This is particularly important for measuring large impedances, typical for dispersive readouts of single-electron devices because even a small mismatch will cause a strong signal degradation.
View Article and Find Full Text PDFThe engineering of a compact qubit unit cell that embeds all quantum functionalities is mandatory for large-scale integration. In addition, these functionalities should present the lowest error rate possible to successfully implement quantum error correction protocols. Electron spins in silicon quantum dots are particularly promising because of their high control fidelity and their potential compatibility with complementary metal-oxide-semiconductor industrial platforms.
View Article and Find Full Text PDFIn most superconductors, the transition to the superconducting state is driven by the binding of electrons into Cooper pairs [1]. The condensation of these pairs into a single, phase coherent, quantum state takes place at the same time as their formation at the transition temperature, . A different scenario occurs in some disordered, amorphous, superconductors: Instead of a pairing-driven transition, in-coherent Cooper pairs first pre-form above , causing the opening of a pseudogap, and then, at , condense into the phase coherent superconducting state [2-11].
View Article and Find Full Text PDFIn a semiconductor spin qubit with sizable spin-orbit coupling, coherent spin rotations can be driven by a resonant gate-voltage modulation. Recently, we have exploited this opportunity in the experimental demonstration of a hole spin qubit in a silicon device. Here we investigate the underlying physical mechanisms by measuring the full angular dependence of the Rabi frequency, as well as the gate-voltage dependence and anisotropy of the hole g factor.
View Article and Find Full Text PDFWe report on dual-gate reflectometry in a metal-oxide-semiconductor double-gate silicon transistor operating at low temperature as a double quantum dot device. The reflectometry setup consists of two radio frequency resonators respectively connected to the two gate electrodes. By simultaneously measuring their dispersive responses, we obtain the complete charge stability diagram of the device.
View Article and Find Full Text PDFJ Phys Condens Matter
March 2016
Recent progresses in quantum dots technology allow fundamental studies of single donors in various semiconductor nanostructures. For the prospect of applications figures of merits such as scalability, tunability, and operation at relatively large temperature are of prime importance. Beyond the case of actual dopant atoms in a host crystal, similar arguments hold for small enough quantum dots which behave as artificial atoms, for instance for single spin control and manipulation.
View Article and Find Full Text PDFWe report the observation of an atomic like behavior from T = 4.2 K up to room temperature in n- and p-type Ω-gate silicon nanowire (NW) transistors. For that purpose, we modified the design of a NW transistor and introduced long spacers between the source/drain and the channel in order to separate the channel from the electrodes.
View Article and Find Full Text PDFWe investigate the gate-induced onset of few-electron regime through the undoped channel of a silicon nanowire field-effect transistor. By combining low-temperature transport measurements and self-consistent calculations, we reveal the formation of one-dimensional conduction modes localized at the two upper edges of the channel. Charge traps in the gate dielectric cause electron localization along these edge modes, creating elongated quantum dots with characteristic lengths of ∼10 nm.
View Article and Find Full Text PDFWe report the electronic transport on n-type silicon single electron transistors (SETs) fabricated in complementary metal oxide semiconductor (CMOS) technology. The n-type metal oxide silicon SETs (n-MOSSETs) are built within a pre-industrial fully depleted silicon on insulator (FDSOI) technology with a silicon thickness down to 10 nm on 200 mm wafers. The nominal channel size of 20 × 20 nm(2) is obtained by employing electron beam lithography for active and gate level patterning.
View Article and Find Full Text PDFWe report on a technique enabling electrical control of the contact silicidation process in silicon nanowire devices. Undoped silicon nanowires were contacted by pairs of nickel electrodes, and each contact was selectively silicided by means of the Joule effect. By a real-time monitoring of the nanowire electrical resistance during the contact silicidation process we were able to fabricate nickel-silicide/silicon/nickel-silicide devices with controlled silicon channel length down to 8 nm.
View Article and Find Full Text PDFA superconducting state is characterized by the gap in the electronic density of states, which vanishes at the superconducting transition temperature T(c). It was discovered that in high-temperature superconductors, a noticeable depression in the density of states, the pseudogap, still remains even at temperatures above T(c). Here, we show that a pseudogap exists in a conventional superconductor, ultrathin titanium nitride films, over a wide range of temperatures above T(c).
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