Publications by authors named "Marc Salleras"

The strong reduction of thermal conductivity with respect to bulk silicon makes nanostructured silicon one of the best materials for highly efficient direct conversion of heat into electrical power and vice-versa. The widespread technologies for the integration of silicon devices can be used to define on-chip micro thermoelectric generators (scavengers); similar structures could also be used for precise and well-localized cooling through the reverse process of heat pumping. However, the road to the fabrication of integrated thermal energy scavengers or cooler, based on silicon, is still very long.

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Nanostructured materials present improved thermoelectric properties due to non-trivial effects at the nanoscale. However, the characterization of individual nanostructures, especially from the thermal point of view, is still an unsolved topic. This work presents the complete structural, morphological, and thermoelectrical evaluation of the selfsame individual bottom-up integrated nanowire employing an innovative micro-machined device compatible with transmission electron microscopy whose fabrication is also discussed.

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A novel combined setup, with a scanning thermal microscope (SThM) embedded in a scanning electron microscope (SEM), is used to characterize a suspended silicon rough nanowire (NW), which is epitaxially clamped at both sides and therefore monolithically integrated in a microfabricated device. The rough nature of the NW surface, which prohibits vacuum-SThM due to loose contact for heat dissipation, is circumvented by decorating the NW with periodic platinum dots. Reproducible approaches over these dots, enabled by the live feedback image provided by the SEM, yield a strong improvement in thermal contact resistance and a higher accuracy in its estimation.

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Semiconductor nanowires have demonstrated fascinating properties with applications in a wide range of fields, including energy and information technologies. Particularly, increasing attention has focused on SiGe nanowires for applications in a thermoelectric generation. In this work, a bottom-up vapour-liquid-solid chemical vapour Deposition methodology is employed to integrate heavily boron-doped SiGe nanowires on thermoelectric generators.

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Micromachined devices were developed and fabricated using complementary metal-oxide-semiconductor (CMOS)/micro-electro-mechanical systems (MEMS) technology allowing for the analysis of transport properties of silicon sub-micron beams having monolithic contacts. The beams were fabricated by a combination of deep reactive ion etching (RIE) and potassium hydroxide (KOH) etching techniques on standard p and n silicon bulk and silicon-on-insulator (SOI) wafers. Simultaneous fabrication of many devices on one wafer allows for the extraction of statistical information to properly compare the different layers and contacts.

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Semiconductor nanowires have demonstrated fascinating properties with application in a wide range of fields including energy and information technologies. In particular, increasing attention has been focused on Si and SiGe nanowires for application in thermoelectric generation after recent successful implementation in miniaturized devices. Despite this interest, an appropriate evaluation of thermal conductivity in such nanostructures still poses a great challenge, especially if the characterization of the device-integrated nanowire is desired.

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The thermoelectric performance of nanostructured low dimensional silicon and silicon-germanium has been functionally compared device-wise. The arrays of nanowires of both materials, grown by a VLS-CVD (Vapor-Liquid-Solid Chemical Vapor Deposition) method, have been monolithically integrated in a silicon micromachined structure in order to exploit the improved thermoelectric properties of nanostructured silicon-based materials. The device architecture helps to translate a vertically occurring temperature gradient into a lateral temperature difference across the nanowires.

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