Proper timing synchronization is important when data from sensors are acquired by different devices. This paper proposes a simple but effective solution for System on Chip (SoC) architectures that integrates a general-purpose Field Programmable Gate Array (FPGA) with a CPU. The proposed approach relies on a network synchronization protocol implemented in software, such as Network Time Protocol (NTP) or Precision Time Protocol (PTP), and uses the FPGA to generate a clock reference that is maintained in step with the synchronized system clock.
View Article and Find Full Text PDFEvent-driven data acquisition is used to capture information from fast transient phenomena typically requiring a high sampling speed. This is an important requirement in the ITER Neutral Beam Test Facility for the development of one of the heating systems of the ITER nuclear fusion experiment. The Red Pitaya board has been chosen for this project because of its versatility and low cost.
View Article and Find Full Text PDFThe Industrial Internet of Things (IIoT) paradigm represents a significant leap forward for sensor networks, potentially enabling wide-area and innovative measurement systems. In this scenario, smart sensors might be equipped with novel low-power and long range communication technologies to realize a so-called low-power wide-area network (LPWAN). One of the most popular representative cases is the LoRaWAN (Long Range WAN) network, where nodes are based on the widespread LoRa physical layer, generally optimized to minimize energy consumption, while guaranteeing long-range coverage and low-cost deployment.
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