Parametric Amplifiers Based on Quantum Dots.

Josephson parametric amplifiers (JPAs) approaching quantum-limited noise performance have been instrumental in enabling high fidelity readout of superconducting qubits and, recently, semiconductor quantum dots (QDs). We propose that the quantum capacitance arising in electronic two-level systems (the dual of Josephson inductance) can provide an alternative dissipationless nonlinear element for parametric amplification. We experimentally demonstrate phase-sensitive parametric amplification using a QD-reservoir electron transition in a CMOS nanowire split-gate transistor embedded in a 1.

Single-electron operations in a foundry-fabricated array of quantum dots.

Silicon quantum dots are attractive for the implementation of large spin-based quantum processors in part due to prospects of industrial foundry fabrication. However, the large effective mass associated with electrons in silicon traditionally limits single-electron operations to devices fabricated in customized academic clean rooms. Here, we demonstrate single-electron occupations in all four quantum dots of a 2 x 2 split-gate silicon device fabricated entirely by 300-mm-wafer foundry processes.

Single-Electron Operation of a Silicon-CMOS 2 × 2 Quantum Dot Array with Integrated Charge Sensing.

The advanced nanoscale integration available in CMOS technology provides a key motivation for its use in spin-based quantum computing applications. Initial demonstrations of quantum dot formation and spin blockade in CMOS foundry-compatible devices are encouraging, but results are yet to match the control of individual electrons demonstrated in university-fabricated multigate designs. We show that quantum dots formed in a CMOS nanowire device can be measured with a remote single electron transistor (SET) formed in an adjacent nanowire, via floating coupling gates.

Remote Capacitive Sensing in Two-Dimensional Quantum-Dot Arrays.

We investigate gate-induced quantum dots in silicon nanowire field-effect transistors fabricated using a foundry-compatible fully depleted silicon-on-insulator (FD-SOI) process. A series of split gates wrapped over the silicon nanowire naturally produces a 2 × bilinear array of quantum dots along a single nanowire. We begin by studying the capacitive coupling of quantum dots within such a 2 × 2 array and then show how such couplings can be extended across two parallel silicon nanowires coupled together by shared, electrically isolated, "floating" electrodes.

Gate-based high fidelity spin readout in a CMOS device.

The engineering of a compact qubit unit cell that embeds all quantum functionalities is mandatory for large-scale integration. In addition, these functionalities should present the lowest error rate possible to successfully implement quantum error correction protocols. Electron spins in silicon quantum dots are particularly promising because of their high control fidelity and their potential compatibility with complementary metal-oxide-semiconductor industrial platforms.

Electrical Spin Driving by g-Matrix Modulation in Spin-Orbit Qubits.

In a semiconductor spin qubit with sizable spin-orbit coupling, coherent spin rotations can be driven by a resonant gate-voltage modulation. Recently, we have exploited this opportunity in the experimental demonstration of a hole spin qubit in a silicon device. Here we investigate the underlying physical mechanisms by measuring the full angular dependence of the Rabi frequency, as well as the gate-voltage dependence and anisotropy of the hole g factor.