The need for power-efficient devices, such as smart sensor nodes, mobile devices, and portable digital gadgets, is markedly increasing and these devices are becoming commonly used in daily life. These devices continue to demand an energy-efficient cache memory designed on Static Random-Access Memory (SRAM) with enhanced speed, performance, and stability to perform on-chip data processing and faster computations. This paper presents an energy-efficient and variability-resilient 11T (EVR11T) SRAM cell, which is designed with a novel Data-Aware Read-Write Assist (DARWA) technique.
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