Large-scale sub-5-nm vertical transistors by van der Waals integration.

Vertical field effect transistor (VFET), in which the semiconductor is sandwiched between source/drain electrodes and the channel length is simply determined by the semiconductor thickness, has demonstrated promising potential for short channel devices. However, despite extensive efforts over the past decade, scalable methods to fabricate ultra-short channel VFETs remain challenging. Here, we demonstrate a layer-by-layer transfer process of large-scale indium gallium zinc oxide (IGZO) semiconductor arrays and metal electrodes, and realize large-scale VFETs with ultra-short channel length and high device performance.

High-density vertical sidewall MoS transistors through T-shape vertical lamination.

Vertical transistors, in which the source and drain are aligned vertically and the current flow is normal to the wafer surface, have attracted considerable attention recently. However, the realization of high-density vertical transistors is challenging, and could be largely attributed to the incompatibility between vertical structures and conventional lateral fabrication processes. Here we report a T-shape lamination approach for realizing high-density vertical sidewall transistors, where lateral transistors could be pre-fabricated on planar substrates first and then laminated onto vertical substrates using T-shape stamps, hence overcoming the incompatibility between planar processes and vertical structures.

van der Waals Contact for Two-Dimensional Transition Metal Dichalcogenides.

Two-dimensional (2D) transition metal dichalcogenides (TMDs) have emerged as highly promising candidates for next-generation electronics owing to their atomically thin structures and surfaces devoid of dangling bonds. However, establishing high-quality metal contacts with TMDs presents a critical challenge, primarily attributed to their ultrathin bodies and delicate lattices. These distinctive characteristics render them susceptible to physical damage and chemical reactions when conventional metallization approaches involving "high-energy" processes are implemented.

Edge-by-Edge Lateral Heterostructure through Interfacial Sliding.

van der Waals heterostructures (vdWHs) based on two-dimensional (2D) semiconductors have attracted considerable attention. However, the reported vdWHs are largely based on vertical device structure with large overlapping area, while the realization of lateral heterostructures contacted through 2D edges remains challenging and is majorly limited by the difficulties of manipulating the lateral distance of 2D materials at nanometer scale (during transfer process). Here, we demonstrate a simple interfacial sliding approach for realizing an edge-by-edge lateral contact.

Ultrashort vertical-channel MoS transistor using a self-aligned contact.

Two-dimensional (2D) semiconductors hold great promises for ultra-scaled transistors. In particular, the gate length of MoS transistor has been scaled to 1 nm and 0.3 nm using single wall carbon nanotube and graphene, respectively.

Ag-Assisted Dry Exfoliation of Large-Scale and Continuous 2D Monolayers.

Two-dimensional (2D) semiconductors have generated considerable attention for high-performance electronics and optoelectronics. However, to date, it is still challenging to mechanically exfoliate large-area and continuous monolayers while retaining their intrinsic properties. Here, we report a simple dry exfoliation approach to produce large-scale and continuous 2D monolayers by using a Ag film as the peeling tape.

Realizing On/Off Ratios over 10 for Sub-2 nm Vertical Transistors.

Vertical transistors hold promise for the development of ultrascaled transistors. However, their on/off ratios are limited by a strong source-drain tunneling current in the off state, particularly for vertical devices with a sub-5 nm channel length. Here, we report an approach for suppressing the off-state tunneling current by designing the barrier height via a van der Waals metal contact.

High-Density Vertical Transistors with Pitch Size Down to 20 nm.

Vertical field effect transistors (VFETs) have attracted considerable interest for developing ultra-scaled devices. In particular, individual VFET can be stacked on top of another and does not consume additional chip footprint beyond what is needed for a single device at the bottom, representing another dimension for high-density transistors. However, high-density VFETs with small pitch size are difficult to fabricate and is largely limited by the trade-offs between drain thickness and its conductivity.

Mobility Enhancement of Strained MoS Transistor on Flat Substrate.

Strain engineering has been proposed as a promising method to boost the carrier mobility of two-dimensional (2D) semiconductors. However, state-of-the-art straining approaches are largely based on putting 2D semiconductors on flexible substrates or rough substrate with nanostructures (., nanoparticles, nanorods, ripples), where the observed mobility change is not only dependent on channel strain but could be impacted by the change of dielectric environment as well as rough interface scattering.

Wafer-scale high-κ dielectrics for two-dimensional circuits via van der Waals integration.

The practical application of two-dimensional (2D) semiconductors for high-performance electronics requires the integration with large-scale and high-quality dielectrics-which however have been challenging to deposit to date, owing to their dangling-bonds-free surface. Here, we report a dry dielectric integration strategy that enables the transfer of wafer-scale and high-κ dielectrics on top of 2D semiconductors. By utilizing an ultra-thin buffer layer, sub-3 nm thin AlO or HfO dielectrics could be pre-deposited and then mechanically dry-transferred on top of MoS monolayers.

Wafer-scale and universal van der Waals metal semiconductor contact.

Van der Waals (vdW) metallic contacts have been demonstrated as a promising approach to reduce the contact resistance and minimize the Fermi level pinning at the interface of two-dimensional (2D) semiconductors. However, only a limited number of metals can be mechanically peeled and laminated to fabricate vdW contacts, and the required manual transfer process is not scalable. Here, we report a wafer-scale and universal vdW metal integration strategy readily applicable to a wide range of metals and semiconductors.

Strain Releasing of Flexible 2D Electronics through van der Waals Sliding Contact.

Two-dimensional (2D) materials have demonstrated promising potential for flexible electronics, owning to their atomic thin body thickness and dangling-bond-free surface. Here, we report a sliding contact device structure for efficient strain releasing. By fabricating a weakly coupled metal-2D junction with a van der Waals (vdW) gap in between, the applied strain could be effectively released through their interface sliding; hence minimized strain is transferred to the 2D lattice.

Strain-Plasmonic Coupled Broadband Photodetector Based on Monolayer MoS.

2D Semiconductors are promising in the development of next-generation photodetectors. However, the performances of 2D photodetectors are largely limited by their poor light absorption (due to ultrathin thickness) and small detection range (due to large bandgap). To overcome the limitations, a strain-plasmonic coupled 2D photodetector is designed by mechanically integrating monolayer MoS on top of prefabricated Au nanoparticle arrays.

Reversible Superconductor-Insulator Transition in (Li, Fe)OHFeSe Flakes Visualized by Gate-Tunable Scanning Tunneling Spectroscopy.

Electric field control of charge carrier density provides a key technology to continuously tune the ground states and map out the phase diagram of correlated electron systems in one device. This technique is highly expected to be combined with the modern state-of-the art spectroscopic probes, such as angle-resolved photoemission spectroscopy and scanning tunneling microscopy/spectroscopy (STM/S), to efficiently address these states and the underlying physics. However, it is extremely difficult and not successful so far, mainly because the fabrication process of such devices makes them prohibitive for surface probes.

Transition from Ferromagnetic Semiconductor to Ferromagnetic Metal with Enhanced Curie Temperature in CrGeTe via Organic Ion Intercalation.

Magnetism in the two-dimensional limit has become an intriguing topic for exploring new physical phenomena and potential applications. Especially, the two-dimensional magnetism is often associated with novel intrinsic spin fluctuations and versatile electronic structures, which provides vast opportunities in 2D material research. However, it is still challenging to verify candidate materials hosting two-dimensional magnetism, since the prototype systems have to be realized by using mechanical exfoliation or atomic layer deposition.

Electric-field-controlled superconductor-ferromagnetic insulator transition.

Superconductivity beyond electron-phonon mechanism is always twisted with magnetism. Based on a new field-effect transistor with solid ion conductor as the gate dielectric (SIC-FET), we successfully achieve an electric-field-controlled phase transition between superconductor and ferromagnetic insulator in (Li,Fe)OHFeSe. A dome-shaped superconducting phase with optimal T of 43 K is continuously tuned into a ferromagnetic insulating phase, which exhibits an electric-field-controlled quantum critical behavior.

Magnetic-field enhanced high-thermoelectric performance in topological Dirac semimetal CdAs crystal.

Thermoelectric materials can be used to convert heat to electric power through the Seebeck effect. We study magneto-thermoelectric figure of merit (ZT) in three-dimensional Dirac semimetal CdAs crystal. It is found that enhancement of power factor and reduction of thermal conductivity can be realized at the same time through magnetic field although magnetoresistivity is greatly increased.