Single-Mode Laser in the Telecom Range by Deterministic Amplification of the Topological Interface Mode.

Photonic integrated circuits are paving the way for novel on-chip functionalities with diverse applications in communication, computing, and beyond. The integration of on-chip light sources, especially single-mode lasers, is crucial for advancing those photonic chips to their full potential. Recently, novel concepts involving topological designs introduced a variety of options for tuning device properties, such as the desired single-mode emission.

Thermal Simulation and Experimental Analysis of Optically Pumped InP-on-Si Micro- and Nanocavity Lasers.

There is a general trend of downscaling laser cavities, but with high integration and energy densities of nanocavity lasers, significant thermal issues affect their operation. The complexity of geometrical parameters and the various materials involved hinder the extraction of clear design guidelines and operation strategies. Here, we present a systematic thermal analysis of InP-on-Si micro- and nanocavity lasers based on steady-state and transient thermal simulations and experimental analysis.

Single-Mode Emission in InP Microdisks on Si Using Au Antenna.

An important building block for on-chip photonic applications is a scaled emitter. Whispering gallery mode cavities based on III-Vs on Si allow for small device footprints and lasing with low thresholds. However, multimodal emission and wavelength stability over a wider range of temperature can be challenging.

Waveguide coupled III-V photodiodes monolithically integrated on Si.

The seamless integration of III-V nanostructures on silicon is a long-standing goal and an important step towards integrated optical links. In the present work, we demonstrate scaled and waveguide coupled III-V photodiodes monolithically integrated on Si, implemented as InP/InGaAs/InP p-i-n heterostructures. The waveguide coupled devices show a dark current down to 0.

Scaling of metal-clad InP nanodisk lasers: optical performance and thermal effects.

A key component for optical on-chip communication is an efficient light source. However, to enable low energy per bit communication and local integration with Si CMOS, devices need to be further scaled down. In this work, we fabricate micro- and nanolasers of different shapes in InP by direct wafer bonding on Si.

Coupled VO Oscillators Circuit as Analog First Layer Filter in Convolutional Neural Networks.

In this work we present an in-memory computing platform based on coupled VO oscillators fabricated in a crossbar configuration on silicon. Compared to existing platforms, the crossbar configuration promises significant improvements in terms of area density and oscillation frequency. Further, the crossbar devices exhibit low variability and extended reliability, hence, enabling experiments on 4-coupled oscillator.

Wurtzite InP microdisks: from epitaxy to room-temperature lasing.

Metastable wurtzite crystal phases of conventional semiconductors comprise enormous potential for high-performance electro-optical devices, owed to their extended tunable direct band gap range. However, synthesizing these materials in good quality and beyond nanowire size constraints has remained elusive. In this work, the epitaxy of wurtzite InP microdisks and related geometries on insulator for advanced optical applications is explored.

Hybrid III-V Silicon Photonic Crystal Cavity Emitting at Telecom Wavelengths.

Photonic crystal (PhC) cavities are promising candidates for Si photonics integrated circuits due to their ultrahigh quality ()-factors and small mode volumes. Here, we demonstrate a novel concept of a one-dimensional hybrid III-V/Si PhC cavity which exploits a combination of standard silicon-on-insulator technology and active III-V materials. Using template-assisted selective epitaxy, the central part of a Si PhC lattice is locally replaced with III-V gain material.

High-speed III-V nanowire photodetector monolithically integrated on Si.

Direct epitaxial growth of III-Vs on silicon for optical emitters and detectors is an elusive goal. Nanowires enable the local integration of high-quality III-V material, but advanced devices are hampered by their high-aspect ratio vertical geometry. Here, we demonstrate the in-plane monolithic integration of an InGaAs nanostructure p-i-n photodetector on Si.

Exploring the Size Limitations of Wurtzite III-V Film Growth.

Metastable crystal phases of abundant semiconductors such as III-Vs, Si, or Ge comprise enormous potential to address current limitations in green light-emitting electrical diodes (LEDs) and group IV photonics. At the same time, these nonconventional polytypes benefit from the chemical similarity to their stable counterparts, which enables the reuse of established processing technology. One of the main challenges is the very limited availability and the small crystal sizes that have been obtained so far.

Facet-selective group-III incorporation in InGaAs template assisted selective epitaxy.

InGaAs is a potential candidate for Si replacement in upcoming advanced technological nodes because of its excellent electron transport properties and relatively low interface defect density in dielectric gate stacks. Therefore, integrating InGaAs devices with the established Si platforms is highly important. Using template-assisted selective epitaxy (TASE), InGaAs nanowires can be monolithically integrated with high crystal quality, although the mechanisms of group III incorporation in this ternary material have not been thoroughly investigated.

Concurrent Zinc-Blende and Wurtzite Film Formation by Selection of Confined Growth Planes.

Recent research on nanowires (NWs) demonstrated the ability of III-V semiconductors to adopt a different crystallographic phase when they are grown as nanostructures, giving rise to a novel class of materials with unique properties. Controlling the crystal structure however remains difficult and the geometrical constraints of NWs cause integration challenges for advanced devices. Here, we report for the first time on the phase-controlled growth of micron-sized planar InP films by selecting confined growth planes during template-assisted selective epitaxy.

Dopant-Induced Modifications of Ga InP Nanowire-Based p-n Junctions Monolithically Integrated on Si(111).

Today, silicon is the most used material in photovoltaics, with the maximum conversion efficiency getting very close to the Shockley-Queisser limit for single-junction devices. Integrating silicon with higher band-gap ternary III-V absorbers is the path to increase the conversion efficiency. Here, we report on the first monolithic integration of Ga InP vertical nanowires, and the associated p-n junctions, on silicon by the Au-free template-assisted selective epitaxy (TASE) method.

Room-Temperature Lasing from Monolithically Integrated GaAs Microdisks on Silicon.

Additional functionalities on semiconductor microchips are progressively important in order to keep up with the ever-increasing demand for more powerful computational systems. Monolithic III-V integration on Si promises to merge mature Si CMOS processing technology with III-V semiconductors possessing superior material properties, e. g.

High-Mobility GaSb Nanostructures Cointegrated with InAs on Si.

GaSb nanostructures integrated on Si substrates are of high interest for p-type transistors and mid-IR photodetectors. Here, we investigate the metalorganic chemical vapor deposition and properties of GaSb nanostructures monolithically integrated onto silicon-on-insulator wafers using template-assisted selective epitaxy. A high degree of morphological control allows for GaSb nanostructures with critical dimensions down to 20 nm.

Vertical III-V nanowire device integration on Si(100).

We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO2 nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template.

In situ doping of catalyst-free InAs nanowires.

We report on in situ doping of InAs nanowires grown by metal-organic vapor-phase epitaxy without any catalyst particles. The effects of various dopant precursors (Si(2)H(6), H(2)S, DETe, CBr(4)) on the nanowire morphology and the axial and radial growth rates are investigated to select dopants that enable control of the conductivity in a broad range and that concomitantly lead to favorable nanowire growth. In addition, the resistivity of individual wires was measured for different gas-phase concentrations of the dopants selected, and the doping density and mobility were extracted.