Atomic Scale Modulation of Self-Rectifying Resistive Switching by Interfacial Defects.

Higher memory density and faster computational performance of resistive switching cells require reliable array-accessible architecture. However, selecting a designated cell within a crossbar array without interference from sneak path currents through neighboring cells is a general problem. Here, a highly doped n Si as the bottom electrode with Ni-electrode/HfO /SiO asymmetric self-rectifying resistive switching device is fabricated.

Probing and Manipulating the Interfacial Defects of InGaAs Dual-Layer Metal Oxides at the Atomic Scale.

The interface between III-V and metal-oxide-semiconductor materials plays a central role in the operation of high-speed electronic devices, such as transistors and light-emitting diodes. The high-speed property gives the light-emitting diodes a high response speed and low dark current, and they are widely used in communications, infrared remote sensing, optical detection, and other fields. The rational design of high-performance devices requires a detailed understanding of the electronic structure at this interface; however, this understanding remains a challenge, given the complex nature of surface interactions and the dynamic relationship between the morphology evolution and electronic structures.

Using post-breakdown conduction study in a MIS structure to better understand the resistive switching mechanism in an MIM stack.

We apply our understanding of the physics of failure in the post-breakdown regime of high-κ dielectric-based conventional logic transistors having a metal-insulator-semiconductor (MIS) structure to interpret the mechanism of resistive switching in resistive random-access memory (RRAM) technology metal-insulator-metal (MIM) stacks. Oxygen vacancies, gate metal migration and metal filament formation in the gate dielectric which constitute the chemistry of breakdown in the post-breakdown stage of logic gate stacks are attributed to be the mechanisms responsible for the SET process in RRAM technology. In this paper, we draw an analogy between the breakdown study in logic devices and filamentation physics in resistive non-volatile memory.