Effect of Conductive Layer Condition on the Morphology of Anodic Aluminum Oxide Template-Assisted Indium Antimonide Nanowires.

Indium antimonide nanowires were synthesized by electrochemical deposition using anodic aluminum oxide template in the presence of gold film as conductive layers. Field emission scanning electron microscopy and energy dispersive X-ray spectrometry measurements were carried out to investigate the effect of adhesive insulated tape covered below the conductive layer. Results showed that the anodic aluminum oxide template covered with insulating tapes had better morphology with less presence of overgrown rough film on the topside of the anodic aluminum oxide template and it exhibited a smoother nanowire sidewall as compared to the uncovered ones.

Effect of Ratio in Ammonium Nitrate on the Structural, Microstructural, Magnetic, and AC Conductivity Properties of BaFeO.

This paper investigates the effect of the ratio of ammonium nitrate (AN) on the structural, microstructural, magnetic, and alternating current (AC) conductivity properties of barium hexaferrite (BaFeO). The BaFeO were prepared by using the salt melt method. The samples were synthesized using different powder-to-salt weight ratio variations (1:3, 1:4, 1:5, 1:6 and 1:7) of BaCO₃ + Fe₂O₃ and ammonium nitrate salt.

Influence of pH Adjustment Parameter for Sol-Gel Modification on Structural, Microstructure, and Magnetic Properties of Nanocrystalline Strontium Ferrite.

Synthesis of nanocrystalline strontium ferrite (SrFeO) via sol-gel is sensitive to its modification parameters. Therefore, in this study, an attempt of regulating the pH as a sol-gel modification parameter during preparation of SrFeO nanoparticles sintered at a low sintering temperature of 900 °C has been presented. The relationship of varying pH (pH 0 to 8) on structural, microstructures, and magnetic behaviors of SrFeO nanoparticles were characterized by X-ray diffraction (XRD), field emission scanning microscope (FESEM), and vibrating sample magnetometer (VSM).

Pinch-off mechanism in double-lateral-gate junctionless transistors fabricated by scanning probe microscope based lithography.

A double-lateral-gate p-type junctionless transistor is fabricated on a low-doped (10(15)) silicon-on-insulator wafer by a lithography technique based on scanning probe microscopy and two steps of wet chemical etching. The experimental transfer characteristics are obtained and compared with the numerical characteristics of the device. The simulation results are used to investigate the pinch-off mechanism, from the flat band to the off state.

Electrical property comparison and charge transmission in p-type double gate and single gate junctionless accumulation transistor fabricated by AFM nanolithography.

The junctionless nanowire transistor is a promising alternative for a new generation of nanotransistors. In this letter the atomic force microscopy nanolithography with two wet etching processes was implemented to fabricate simple structures as double gate and single gate junctionless silicon nanowire transistor on low doped p-type silicon-on-insulator wafer. The etching process was developed and optimized in the present work compared to our previous works.