Publications by authors named "Julian J McMorrow"

The development of high-performance multifunctional polymer-based electronic circuits is a major step toward future flexible electronics. Here, we demonstrate a tunable approach to fabricate such devices based on rationally designed dielectric super-lattice structures with photochromic azobenzene molecules. These nanodielectrics possessing ionic, molecular, and atomic polarization are utilized in polymer thin-film transistors (TFTs) to realize high-performance electronics with a p-type field-effect mobility (μ) exceeding 2 cm V s.

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With the growing adoption of interconnected electronic devices in consumer and industrial applications, there is an increasing demand for robust security protocols when transmitting and receiving sensitive data. Toward this end, hardware true random number generators (TRNGs), commonly used to create encryption keys, offer significant advantages over software pseudorandom number generators. However, the vast network of devices and sensors envisioned for the "Internet of Things" will require small, low-cost, and mechanically flexible TRNGs with low computational complexity.

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Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers.

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Solution-processed semiconductor and dielectric materials are attractive for future lightweight, low-voltage, flexible electronics, but their response to ionizing radiation environments is not well understood. Here, we investigate the radiation response of graphene field-effect transistors employing multilayer, solution-processed zirconia self-assembled nanodielectrics (Zr-SANDs) with ZrOx as a control. Total ionizing dose (TID) testing is carried out in situ using a vacuum ultraviolet source to a total radiant exposure (RE) of 23.

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Layer-by-layer assembled 2D montmorillonite nanosheets are shown to be high-performance, solution-processed dielectrics. These scalable and spatially uniform sub-10 nm thick dielectrics yield high areal capacitances of ≈600 nF cm(-2) and low leakage currents down to 6 × 10(-9) A cm(-2) that enable low voltage operation of p-type semiconducting single-walled carbon nanotube and n-type indium gallium zinc oxide field-effect transistors.

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The coupling of hybrid organic-inorganic gate dielectrics with emergent unconventional semiconductors has yielded transistor devices exhibiting record-setting transport properties. However, extensive electronic transport measurements on these high-capacitance systems are often convoluted with the electronic response of the semiconducting silicon substrate. In this report, we demonstrate the growth of solution-processed zirconia self-assembled nanodielectrics (Zr-SAND) on template-stripped aluminum substrates.

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Over the past two decades, extensive research on single-walled carbon nanotubes (SWCNTs) has elucidated their many extraordinary properties, making them one of the most promising candidates for solution-processable, high-performance integrated circuits. In particular, advances in the enrichment of high-purity semiconducting SWCNTs have enabled recent circuit demonstrations including synchronous digital logic, flexible electronics and high-frequency applications. However, due to the stringent requirements of the transistors used in complementary metal-oxide-semiconductor (CMOS) logic as well as the absence of sufficiently stable and spatially homogeneous SWCNT thin-film transistors, the development of large-scale SWCNT CMOS integrated circuits has been limited in both complexity and functionality.

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In this Letter, we demonstrate thin-film single-walled carbon nanotube (SWCNT) complementary metal-oxide-semiconductor (CMOS) logic devices with subnanowatt static power consumption and full rail-to-rail voltage transfer characteristics as is required for logic gate cascading. These results are enabled by a local metal gate structure that achieves enhancement-mode p-type and n-type SWCNT thin-film transistors (TFTs) with widely separated and symmetric threshold voltages. These complementary SWCNT TFTs are integrated to demonstrate CMOS inverter, NAND, and NOR logic gates at supply voltages as low as 0.

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Ambient and solution-processable, low-leakage, high capacitance gate dielectrics are of great interest for advances in low-cost, flexible, thin-film transistor circuitry. Here we report a new hafnium oxide-organic self-assembled nanodielectric (Hf-SAND) material consisting of regular, alternating π-electron layers of 4-[[4-[bis(2-hydroxyethyl)amino]phenyl]diazenyl]-1-[4-(diethoxyphosphoryl) benzyl]pyridinium bromide) (PAE) and HfO2 nanolayers. These Hf-SAND multilayers are grown from solution in ambient with processing temperatures ≤150 °C and are characterized by AFM, XPS, X-ray reflectivity (2.

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We investigate charge injection into the gate dielectric of single-walled carbon nanotube thin-film transistors (SWCNT-TFTs) having Al(2)O(3) and HfO(2) gate dielectrics. We demonstrate the use of electric field gradient microscopy (EFM) to identify the sign and approximate the magnitude of the injected charge carriers. Charge injection rates and saturation levels are found to differ between electrons and holes and also vary according to gate dielectric material.

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