Publications by authors named "Jukka Viheriala"

Use and performance criteria of photonic devices increase in various application areas such as information and communication, lighting, and photovoltaics. In many current and future photonic devices, surfaces of a semiconductor crystal are a weak part causing significant photo-electric losses and malfunctions in applications. These surface challenges, many of which arise from material defects at semiconductor surfaces, include signal attenuation in waveguides, light absorption in light emitting diodes, non-radiative recombination of carriers in solar cells, leakage (dark) current of photodiodes, and light reflection at solar cell interfaces for instance.

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Development of mid-infrared photonics is gaining attention, driven by a multitude of sensing applications requiring increasingly compact and cost-effective photonics systems. To this end, low-loss operation of µm-scale silicon-on-insulator photonic integration elements is demonstrated for the 2.6-2.

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Tunable lasers emitting in the 2-3 µm wavelength range that are compatible with photonic integration platforms are of great interest for sensing applications. To this end, combining GaSb-based semiconductor gain chips with SiN photonic integrated circuits offers an attractive platform. Herein, we utilize the low-loss features of SiN waveguides and demonstrate a hybrid laser comprising a GaSb gain chip with an integrated tunable SiN Vernier mirror.

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The development of integrated photonics experiences an unprecedented growth dynamic, owing to accelerated penetration to new applications. This leads to new requirements in terms of functionality, with the most obvious feature being the increased need for wavelength versatility. To this end, we demonstrate for the first time the flip-chip integration of a GaSb semiconductor optical amplifier with a silicon photonic circuit, addressing the transition of photonic integration technology towards mid-IR wavelengths.

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The length variation associated with standard cleaving of III-V optoelectronic chips is a major source of loss in the integration with the micron-scale silicon-on-insulator waveguides. To this end, a new, to the best of our knowledge, approach for precise definition of the III-V chip length is reported. The method employs lithography and wet etching of cleave marks outside the active III-V waveguides.

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High speed back-to-back transmission of NRZ data at 12.5 Gbit/s was achieved over a repeaterless optical network without the use of forward error correction or optical clock recovery using a hybrid integrated silicon photonics optical interconnect. The interconnect comprises an electroabsorption modulator based on dilute nitride multiple quantum well material on GaAs substrate optically coupled to large core silicon waveguide using passive alignment and flip-chip bonding.

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Dual longitudinal mode distributed feedback lasers have been fabricated using surface gratings with and without apodization. Analytic formulas and simulations that have been used to derive design guidelines are presented. The fabricated device characteristics are in good agreement with the simulations.

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Distributed feedback lasers with laterally coupled ridge-waveguide surface gratings having the protrusions placed alternately on the lateral sides of the ridge are demonstrated. This configuration enables easier-to-fabricate wider trenches than in the gratings with protrusions placed symmetrically on both sides of the ridge. The design strategy and coupling coefficient calculations are discussed.

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We report a single-mode 1180 nm distributed Bragg reflector (DBR) laser diode with a high output power of 340 mW. For the fabrication, we employed novel nanoimprint lithography that ensures cost-effective, large-area, conformal patterning and does not require regrowth. The output characteristics exhibited outstanding temperature insensitivity with a power drop of only 30% for an increase of the mount temperature from 20°C to 80°C.

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Nanoimprint lithography has the potential to cost efficiently realize patterns with extremely narrow linewidth over a large area. A significant challenge to achieving this target is the fabrication of nanoimprint templates. The cost and writing time of conventional electron beam lithography for direct writing of the templates rapidly increases as the patterned area increases and the linewidth decreases.

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