Advancement in microelectronics technology enables autonomous edge computing platforms in the size of a dust mote (<1 mm), bringing efficient and low-cost artificial intelligence close to the end user and Internet-of-Things (IoT) applications. The key challenge for these compact high-performance edge computers is the integration of a power source that satisfies the high-power-density requirement and does not increase the complexity and cost of the packaging. Here, it is shown that dust-sized III-V photovoltaic (PV) cells grown on Si and silicon-on-insulator (SOI) substrates can be integrated using a wafer-level-packaging process and achieve higher power density than all prior micro-PVs on Si and SOI substrates.
View Article and Find Full Text PDFNanostructured porous silicon materials have recently advanced as hosts for Li-metal plating. However, limitations involve detrimental silicon self-pulverization, Li-dendrites, and the ability to achieve wafer-level integration of non-composite, pure silicon anodes. compo.
View Article and Find Full Text PDFAs conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.
View Article and Find Full Text PDFObjective: Mental health and emotional disorders are often associated with higher mortality risk. Whether higher cardiorespiratory fitness (CRF) reduces the risk for all-cause mortality in individuals with emotional distress is not well known.
Patients And Methods: Participants were 5240 men (mean age 46.
We observe the growth of crystalline SiC nanoparticles on Si(001) at 900 °C using in situ electron microscopy. Following nucleation and growth of the SiC, there is a massive migration of Si, forming a crystalline Si mound underneath each nanoparticle that lifts it 4-5 nm above the initial growth surface. The volume of the Si mounds is roughly five to seven times the volume of the SiC nanoparticles.
View Article and Find Full Text PDFThere are numerous studies on the growth of planar films on sp(2)-bonded two-dimensional (2D) layered materials. However, it has been challenging to grow single-crystalline films on 2D materials due to the extremely low surface energy. Recently, buffer-assisted growth of crystalline films on 2D layered materials has been introduced, but the crystalline quality is not comparable with the films grown on sp(3)-bonded three-dimensional materials.
View Article and Find Full Text PDFWe introduce a new experimental technique for manipulating a segment of a charged macromolecule inside a transient nanogap between two fluidic reservoirs. This technique uses an FPGA-driven nanopositioner to control the coupling of a nanopipette with the liquid surface of a fluidic cell. We present results on creating a transient nanogap, triggered by a translocation of double-stranded DNA between a nanopipette and a fluidic cell, and measure the probability to find the molecule near the tip of the nanopipette after closing the gap.
View Article and Find Full Text PDFSo far, realization of reproducible n-type carbon nanotube (CNT) transistors suitable for integrated digital applications has been a difficult task. In this work, hundreds of n-type CNT transistors from three different low work function metals-erbium, lanthanum, and yttrium-are studied and benchmarked against p-type devices with palladium contacts. The crucial role of metal type and deposition conditions is elucidated with respect to overall yield and performance of the n-type devices.
View Article and Find Full Text PDFA process for fabricating dense graphene nanoribbon arrays using self-assembled patterns of block copolymers on graphene grown epitaxially on SiC on the wafer scale has been developed. Etching masks comprising long and straight nanoribbon array structures with linewidths as narrow as 10 nm were fabricated, and the patterns were transferred to graphene. Our process combines both top-down and self-assembly steps to fabricate long graphene nanoribbon arrays with low defect counts.
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