Publications by authors named "Jiho Joo"

Wireless modules that provide telecommunications and power-harvesting capabilities enabled by radio-frequency (RF) electronics are vital components of skin-interfaced stretchable electronics. However, recent studies on stretchable RF components have demonstrated that substantial changes in electrical properties, such as a shift in the antenna resonance frequency, occur even under relatively low elastic strains. Such changes lead directly to greatly reduced wireless signal strength or power-transfer efficiency in stretchable systems, particularly in physically dynamic environments such as the surface of the skin.

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The aim of this study was to develop a flexible package technology using laser-assisted bonding (LAB) technology and an anisotropic solder paste (ASP) material ultimately to reduce the bonding temperature and enhance the flexibility and reliability of flexible devices. The heat transfer phenomena during the LAB process, mechanical deformation, and the flexibility of a flexible package were analyzed by experimental and numerical simulation methods. The flexible package was fabricated with a silicon chip and a polyimide (PI) substrate.

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We fabricate three-dimensional wavelength-division multiplexing (3D-WDM) interconnects comprising three SiN layers using a CMOS-compatible process. In these interconnects, the optical signals are coupled directly to a SiN grating coupler in the middle SiN layer and demultiplexed by a 1 × 4 SiN array waveguide grating (AWG). The demultiplexed optical signals are interconnected from the middle SiN layer to the bottom and top SiN layers by four SiON interlayer couplers.

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An epoxy-based solder paste (ESP) is a promising alternative to conventional solder pastes to improve the reliability of fine-pitch electrical joining because the epoxy encapsulates the solder joint. However, development of an appropriate epoxy formulation and investigation of its reaction mechanism with solder powder is challenging. In this study, we demonstrate a newly designed ESP consisting of diglycidyl ether of bisphenol F (DGEBF) resin, Sn-3.

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This study explored the feasibility of a fast and uniform large-scale laser sintering method for sintering stretchable electrodes. A homogenized rectangular infrared (IR) laser with a wavelength of 980 nm was used in the sintering process. A highly stretchable composite electrode was fabricated using silver (Ag) microparticles and Ag flakes as the fillers and polyester resin as the binder on the polyurethane substrate.

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We investigate the reduction of transition loss across the star coupler boundary in a silicon arrayed waveguide grating (AWG) by suppressing multimode generation and scattering near the boundary of a star coupler. Eight-channel silicon AWGs were designed with optimal conditions based on enhanced field matching in combination with ultrashallow etched structures. The fabricated AWG demonstrates an insertion loss down to 0.

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When silicon photonic integrated circuits (PICs), defined for transmitting and receiving optical data, are successfully monolithic-integrated into major silicon electronic chips as chip-level optical I/Os (inputs/outputs), it will bring innovative changes in data computing and communications. Here, we propose new photonic integration scheme, a single-chip optical transceiver based on a monolithic-integrated vertical photonic I/O device set including light source on bulk-silicon. This scheme can solve the major issues which impede practical implementation of silicon-based chip-level optical interconnects.

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We present the hybrid-integrated silicon photonic receiver and transmitter based on silicon photonic devices and 65 nm bulk CMOS interface circuits operating over 30 Gb/s with a 10(-12) bit error rate (BER) for λ ~1550nm. The silicon photonic receiver, operating up to 36 Gb/s, is based on a vertical-illumination type Ge-on-Si photodetector (Ge PD) hybrid-integrated with a CMOS receiver front-end circuit (CMOS Rx IC), and exhibits high sensitivities of -11 dBm, -8 dBm, and -2 dBm for data rates of 25 Gb/s, 30 Gb/s and 36 Gb/s, respectively, at a BER of 10(-12). The measured energy efficiency of the Si-photonic receiver is 2.

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We present small-sized depletion-type silicon Mach-Zehnder (MZ) modulator with a vertically dipped PN depletion junction (VDJ) phase shifter based on a CMOS compatible process. The fabricated device with a 100 μm long VDJ phase shifter shows a VπLπ of ∼0.6  V·cm with a 3 dB bandwidth of ∼50  GHz at -2  V bias.

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We present high-sensitivity photoreceivers based on a vertical- illumination-type 100% Ge-on-Si p-i-n photodetectors (PDs), which operate up to 50 Gb/s with high responsivity. A butterfly-packaged photoreceiver using a Ge PD with 3-dB bandwidth (f(-3dB)) of 29 GHz demonstrates the sensitivities of -10.15 dBm for 40 Gb/s data rate and -9.

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This paper reports a fiber-to-chip coupler consisting of a silicon inverted taper and a silicon oxynitride (SiON) double stage taper, where the cascaded taper structure enables adiabatic mode transfer between a submicron silicon waveguide and a single mode fiber. The coupler, fabricated by a simplified process, demonstrates an average coupling loss of 3.6 and 4.

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We present high performance silicon photonic circuits (PICs) defined for off-chip or on-chip photonic interconnects, where PN depletion Mach-Zehnder modulators and evanescent-coupled waveguide Ge-on-Si photodetectors were monolithically integrated on an SOI wafer with CMOS-compatible process. The fabricated silicon PIC(off-chip) for off-chip optical interconnects showed operation up to 30 Gb/s. Under differential drive of low-voltage 1.

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We present a high-sensitivity photoreceiver based on a vertical- illumination-type 100% Ge-on-Si photodetector. The fabricated p-i-n photodetector with a 90 microm-diameter mesa shows the -3 dB bandwidth of 7.7 GHz, and the responsivity of 0.

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