A Van Der Waals Reconfigurable Multi-Valued Logic Device and Circuit Based on Tunable Negative-Differential-Resistance Phenomenon.

Multi-valued logic (MVL) technology that utilizes more than two logic states has recently been reconsidered because of the demand for greater power saving in current binary logic systems. Extensive efforts have been invested in developing MVL devices with multiple threshold voltages by adopting negative differential transconductance and resistance. In this study, a reconfigurable, multiple negative-differential-resistance (m-NDR) device with an electric-field-induced tunability of multiple threshold voltages is reported, which comprises a BP/ReS heterojunction and a ReS /h-BN/metal capacitor.

Electrolyte-Gated Vertical Synapse Array based on Van Der Waals Heterostructure for Parallel Computing.

Recently, three-terminal synaptic devices, which separate read and write terminals, have attracted significant attention because they enable nondestructive read-out and parallel-access for updating synaptic weights. However, owing to their structural features, it is difficult to address the relatively high device density compared with two-terminal synaptic devices. In this study, a vertical synaptic device featuring remotely controllable weight updates via e-field-dependent movement of mobile ions in the ion-gel layer is developed.

Flexible artificial Si-In-Zn-O/ion gel synapse and its application to sensory-neuromorphic system for sign language translation.

We propose a flexible artificial synapse based on a silicon-indium-zinc-oxide (SIZO)/ion gel hybrid structure directly fabricated on a polyimide substrate, where the channel conductance is effectively modulated via ion movement in the ion gel. This synaptic operation is possible because of the low-temperature deposition process of the SIZO layer (<150°C) and the surface roughness improvement of the poly(4-vinylphenol) buffer layer (12.29→1.

Ferroelectric polymer-based artificial synapse for neuromorphic computing.

Recently, various efforts have been made to implement synaptic characteristics with a ferroelectric field-effect transistor (FeFET), but in-depth physical analyses have not been reported thus far. Here, we investigated the effects by (i) the formation temperature of the ferroelectric material, poly(vinylidene fluoride-trifluoroethylene) P(VDF-TrFE) and (ii) the nature of the contact metals (Ti, Cr, Pd) of the FeFET on the operating performance of a FeFET-based artificial synapse in terms of various synaptic performance indices. Excellent ferroelectric properties were induced by maximizing the size and coverage ratio of the β-phase domains by annealing the P(VDF-TrFE) film at 140 °C.