Publications by authors named "Ioannis Vourkas"

Temporal (race) computing schemes rely on temporal memories, where information is represented with the timing of signal edges. Standard digital circuit techniques can be used to capture the relative timing characteristics of signal edges. However, the properties of emerging device technologies could be particularly exploited for more efficient circuit implementations.

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This paper presents a fully digital implementation of a memristor hardware (HW) simulator, as the core of an emulator, based on a behavioral model of voltage-controlled threshold-type bipolar memristors. Compared to other analog solutions, the proposed digital design is compact, easily reconfigurable, demonstrates very good matching with the mathematical model on which it is based, and complies with all the required features for memristor emulators. We validated its functionality using Altera Quartus II and ModelSim tools targeting low-cost yet powerful field-programmable gate array families.

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