Publications by authors named "Ioan Costina"

The Resistive RAM (RRAM) technology is currently in a level of maturity that calls for its integration into CMOS compatible memory arrays. This CMOS integration requires a perfect understanding of the cells performance and reliability in relation to the deposition processes used for their manufacturing. In this paper, the impact of the precursor chemistries and process conditions on the performance of HfO based memristive cells is studied.

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With the continuous scaling of resistive random access memory (RRAM) devices, in-depth understanding of the physical mechanism and the material issues, particularly by directly studying integrated cells, become more and more important to further improve the device performances. In this work, HfO2-based integrated 1-transistor-1-resistor (1T1R) RRAM devices were processed in a standard 0.25 μm complementary-metal-oxide-semiconductor (CMOS) process line, using a batch atomic layer deposition (ALD) tool, which is particularly designed for mass production.

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Integration of graphene with Si microelectronics is very appealing by offering a potentially broad range of new functionalities. New materials to be integrated with the Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet etching and electrochemical delamination methods with respect to residual submonolayer metallic contaminations.

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Integration of functional oxides on Si substrates could open a pathway to integrate diverse devices on Si-based technology. Oxygen vacancies (Vo(··)) can strongly affect solid state properties of oxides, including the room temperature ferromagnetism (RTFM) in diluted magnetic oxides. Here, we report a systematical study on the RTFM of oxygen vacancy engineered (by Pr(3+) doping) CeO2 epitaxial thin films on Si substrates.

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