Reducing Avalanche Build-Up Time by Integrating a Single-Photon Avalanche Diode with a BiCMOS Gating Circuit.

It is shown that the integration of a single-photon avalanche diode (SPAD) together with a BiCMOS gating circuit on one chip reduces the parasitic capacitance a lot and therefore reduces the avalanche build-up time. The capacitance of two bondpads, which are necessary for the connection of an SPAD chip and a gating chip, are eliminated by the integration. The gating voltage transients of the SPAD are measured using an integrated mini-pad and a picoprobe.

Multi-Channel Gating Chip in 0.18 µm High-Voltage CMOS for Quantum Applications.

A gating circuit for a photonic quantum simulator is introduced. The gating circuit uses a large excess bias voltage of up to 9.9 V and an integrated single-photon avalanche diode (SPAD).

Area and Bandwidth Enhancement of an n/p-Well Dot Avalanche Photodiode in 0.35 μm CMOS Technology.

This paper presents a CMOS-integrated dot avalanche photodiode (dot-APD) that features a small central n/p-well hemispherical cathode/p-well structure circularly surrounded by an anode ring. The dot-APD enables wide hemispherical depletion, charge collection from a large volume, and a small multiplication region. These features result in a large light-sensitive area, high responsivity and bandwidth, and exceptionally low junction capacitance.

Indirect Time-of-Flight with GHz Correlation Frequency and Integrated SPAD Reaching Sub-100 µm Precision in 0.35 µm CMOS.

The purpose of this work is to prove the suitability of integrated single-photon avalanche diode (SPAD)-based indirect time-of-flight (iTOF) for sub-100 µm precision depth sensing using a correlation approach with GHz modulation frequencies. For this purpose, a prototype containing a single pixel consisting of an integrated SPAD, quenching circuit, and two independent correlator circuits was fabricated in a 0.35 µm CMOS process and characterized.

Photon detection probability enhancement using an anti-reflection coating in CMOS-based SPADs.

This work presents a simulation and experimental study of the photon detection probability (PDP) enhancement in CMOS single-photon avalanche diodes (SPADs) using an anti-reflection coating (ARC) above the sensitive area. It is shown how the ARC layer can improve the PDP, not only by improving the optical transmission, but also by eliminating the penetration of the standing wave into a shallow region close to the silicon surface, where the multiplication region of the SPAD is formed. Furthermore, the appropriate ARC layer thickness corresponding to maximum PDP enhancement at different wavelengths over the visible spectrum is extracted to provide insight regarding the ARC selection if different ARC thicknesses are available within the CMOS process.

Noise and Breakdown Characterization of SPAD Detectors with Time-Gated Photon-Counting Operation.

Being ready-to-detect over a certain portion of time makes the time-gated single-photon avalanche diode (SPAD) an attractive candidate for low-noise photon-counting applications. A careful SPAD noise and performance characterization, however, is critical to avoid time-consuming experimental optimization and redesign iterations for such applications. Here, we present an extensive empirical study of the breakdown voltage, as well as the dark-count and afterpulsing noise mechanisms for a fully integrated time-gated SPAD detector in 0.

[The Future of EU Finances After COVID-19].

The impact of COVID-19 led to changes in EU financing that pose questions about the shape of the future EU "fiscal constitution". The additional Recovery Fund, with the volume of three-fourths of the new seven year budget, will be financed by the first EU borrowing ever. Is this unprecedented fiscal magnitude necessary to compete with China? Or does the EU need to downsize in two directions: (1) in the volume and differentiation of its various tasks and (2) in the equal rights among its 27 member states (01.

Avalanche Transients of Thick 0.35 µm CMOS Single-Photon Avalanche Diodes.

Two types of single-photon avalanche diodes (SPADs) with different diameters are investigated regarding their avalanche behavior. SPAD type A was designed in standard 0.35-µm complementary metal-oxide-semiconductor (CMOS) including a 12-µm thick p epi-layer with diameters of 50, 100, 200, and 400 µm; and type B was implemented in the high-voltage (HV) line of this process with diameters of 48.

Detecting WDM visible light signals by a single multi-color photodiode with MIMO processing.

For the first time, to the best of our knowledge, we experimentally demonstrate that multiple-input-multiple-output (MIMO) processing allows using a single photodiode to detect simultaneously a wavelength-division multiplexing (WDM) visible light communications (VLC) signal. The photodiode has a triple junction, and when it is illuminated by a WDM signal, the junctions produce inherently three photocurrents that are unusable for detecting any of the WDM signals. However, by means of linear MIMO processing, we are able to recover the transmitted signals exactly.

Optical wireless APD receivers in 0.35 µm HV CMOS technology with large detection area.

The development of two high-speed monolithically integrated optical receivers for wireless optical communication is presented from the design phase to the measurement. The first high-speed receiver is the modified previous design with an integrated 200-µm diameter avalanche photodiode. The redesign improved the optical sensitivity by 3.

species causing leaf-stripe smut revisited.

Leaf-stripe smuts on grasses are a highly polyphyletic group within , occurring in three genera, , , and . Currently more than 12 species inciting stripe smuts are recognised. The majority belong to the -complex, with about 30 different taxa described from 165 different plant species.

Integrated fiber optical receiver reducing the gap to the quantum limit.

Experimental results of a single-photon avalanche diode (SPAD) based optical fiber receiver integrated in 0.35 µm PIN-photodiode CMOS technology are presented. To cope with the parasitic effects of SPADs an array of four receivers is implemented.

Synchronous OEIC Integrating Receiver for Optically Reconfigurable Gate Arrays.

A monolithically integrated optoelectronic receiver with a low-capacitance on-chip pin photodiode is presented. The receiver is fabricated in a 0.35 μm opto-CMOS process fed at 3.

OWC using a monolithically integrated 200 µm APD OEIC in 0.35 µm BiCMOS technology.

A lens-less receiver with a monolithically integrated avalanche photodiode (APD) in 0.35 µm BiCMOS technology has been developed for establishing an indoor 2 Gb/s optical wireless communication (OWC) over a distance of 6.5 m with a receiving angle of 22°.

Vertical triple-junction RGB optical sensor with signal processing based on the determination of the space-charge region borders.

A triple-junction RGB optical sensor with vertically stacked photodiodes and signal processing that provides precise values of the currents generated by blue, green, and red light is presented. The signal processing is based on the determination of the border depths of the space-charge regions of all three photodiodes. A current-mode implementation using current conveyors and variable-gain current amplifiers is introduced.

Automated alignment system for optical wireless communication systems using image recognition.

In this Letter, we describe the realization of a tracked line-of-sight optical wireless communication system for indoor data distribution. We built a laser-based transmitter with adaptive focus and ray steering by a microelectromechanical systems mirror. To execute the alignment procedure, we used a CMOS image sensor at the transmitter side and developed an algorithm for image recognition to localize the receiver's position.

An infrastructure for accurate characterization of single-event transients in digital circuits.

We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure. Major architectural challenges result from the fact that the latter must operate reliably under the same radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard design.

0.35 μm CMOS avalanche photodiode with high responsivity and responsivity-bandwidth product.

A highly sensitive avalanche photodiode (APD) in 0.35 μm CMOS technology is presented. Due to a thick intrinsic absorption layer, a high responsivity at a low bias voltage, where the avalanche gain is 1, is combined with an excellent avalanche gain at high voltages to achieve a maximum overall responsivity of the APD of more than 10 kA/W.

Zero-bias 40Gbit/s germanium waveguide photodetector on silicon.

We report on lateral pin germanium photodetectors selectively grown at the end of silicon waveguides. A very high optical bandwidth, estimated up to 120GHz, was evidenced in 10 µm long Ge photodetectors using three kinds of experimental set-ups. In addition, a responsivity of 0.