Multimodal Encapsulation to Selectively Permeate Hydrogen and Engineer Channel Conduction for p-Type SnO Thin-Film Transistor Applications.

It has been challenging to synthesize p-type SnO (1 < < 2) and engineer the electrical properties such as carrier density and mobility due to the narrow processing window and the localized oxygen 2p orbitals near the valence band. Herein, we report on the multifunctional encapsulation of p-SnO to limit the surface adsorption of oxygen and selectively permeate hydrogen into the p-SnO channel for thin-film transistor (TFT) applications. Time-of-flight secondary ion mass spectrometry (ToF-SIMS) measurements identified that ultrathin SiO as a multifunctional encapsulation layer effectively suppressed the oxygen adsorption on the back channel surface of p-SnO and selectively diffused hydrogen across the entire thickness of the channel.

Layer-resolved release of epitaxial layers in III-V heterostructure via a buffer-free mechanical separation technique.

Layer-release techniques for producing freestanding III-V epitaxial layers have been actively developed for heterointegration of single-crystalline compound semiconductors with Si platforms. However, for the release of target epitaxial layers from III-V heterostructures, it is required to embed a mechanically or chemically weak sacrificial buffer beneath the target layers. This requirement severely limits the scope of processable materials and their epi-structures and makes the growth and layer-release process complicated.

Simultaneous Extraction of the Grain Size, Single-Crystalline Grain Sheet Resistance, and Grain Boundary Resistivity of Polycrystalline Monolayer Graphene.

The electrical properties of polycrystalline graphene grown by chemical vapor deposition (CVD) are determined by grain-related parameters-average grain size, single-crystalline grain sheet resistance, and grain boundary (GB) resistivity. However, extracting these parameters still remains challenging because of the difficulty in observing graphene GBs and decoupling the grain sheet resistance and GB resistivity. In this work, we developed an electrical characterization method that can extract the average grain size, single-crystalline grain sheet resistance, and GB resistivity simultaneously.

High-Performance Oxide-Based p-n Heterojunctions Integrating p-SnO and n-InGaZnO.

The fabrication of oxide-based p-n heterojunctions that exhibit high rectification performance has been difficult to realize using standard manufacturing techniques that feature mild vacuum requirements, low thermal budget processing, and scalability. Critical bottlenecks in the fabrication of these heterojunctions include the narrow processing window of p-type oxides and the charge-blocking performance across the metallurgical junction required for achieving low reverse current and hence high rectification behavior. The overarching goal of the present study is to demonstrate a simple processing route to fabricate oxide-based p-n heterojunctions that demonstrate high on/off rectification behavior, a low saturation current, and a small turn-on voltage.

Effect of Graphene Doping Level near the Metal Contact Region on Electrical and Photoresponse Characteristics of Graphene Photodetector.

Graphene-metal contact is crucial to fabricate high-performance graphene photodetectors since the external quantum efficiency (EQE) of the photodetector depends on the contact properties, and the influence of the contact properties is particularly dominant in short channel devices for high-speed applications. Moreover, junction properties between the channel graphene and graphene near the contact are also important to analyze the photoresponse because the built-in electric field in the junction determines the EQE of the photodetector. In this study, we investigated a relation between the photoresponse and the built-in electric field induced from the doping level difference in the junction between the channel graphene and graphene near the contact.

Optimized poly(methyl methacrylate)-mediated graphene-transfer process for fabrication of high-quality graphene layer.

Graphene grown on a copper (Cu) substrate by chemical vapor deposition (CVD) is typically required to be transferred to another substrate for the fabrication of various electrical devices. PMMA-mediated wet process is the most widely used method for CVD-graphene-transfer. However, PMMA residue and wrinkles that inevitably remain on the graphene surface during the transfer process are critical issues degrading the electrical properties of graphene.