Publications by authors named "Ho-In Lee"

A p-type ternary logic device with a stack-channel structure is demonstrated using an organic p-type semiconductor, dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene (DNTT). A photolithography-based patterning process is developed to fabricate scaled electronic devices with complex organic semiconductor channel structures. Two layers of thin DNTT with a separation layer are fabricated via the low-temperature deposition process, and for the first time, p-type ternary logic switching characteristics exhibiting zero differential conductance in the intermediate current state are demonstrated.

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P-type ternary switch devices are crucial elements for the practical implementation of complementary ternary circuits. This report demonstrates a p-type ternary device showing three distinct electrical output states with controllable threshold voltage values using a dual-channel dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]-thiophene-graphene barristor structure. To obtain transfer characteristics with distinctively separated ternary states, novel structures called contact-resistive and contact-doping layers were developed.

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The purpose of this study was to evaluate the performance of biodegradable polymer sirolimus and ascorbic acid eluting stent systems with four commercially available drug-eluting stents (DES). We investigated the characterization of mechanical properties by dimension, foreshortening, recoil, radial force, crossing profile, folding shape, trackability, and dislodgement force. Additionally, we identify the safety and efficacy evaluation through registry experiments.

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Anti-ambipolar switch (AAS) devices at a narrow bias region are necessary to solve the intrinsic leakage current problem of ternary logic circuits. In this study, an AAS device with a very high peak-to-valley ratio (∼10) and adjustable operating range characteristics was successfully demonstrated using a ZnO and dinaphtho[2,3-:2',3'-]thieno[3,2-]thiophene heterojunction structure. The entire device integration was completed at a low thermal budget of less than 200 °C, which makes this AAS device compatible with monolithic 3D integration.

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Poly(L-lactic acid) (PLLA) has attracted a great deal of attention for its use in biomedical materials such as biodegradable vascular scaffolds due to its high biocompatibility. However, its inherent brittleness and inflammatory responses by acidic by-products of PLLA limit its application in biomedical materials. Magnesium hydroxide (MH) has drawn attention as a potential additive since it has a neutralizing effect.

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Poly(L-lactic acid) (PLLA) has been used as a biodegradable vascular scaffold (BVS) material due to high mechanical property, biodegradability, and biocompatibility. However, acidic byproducts from hydrolysis of PLLA reduce the pH after the surrounding implanted area and cause inflammatory responses. As a result, severe inflammation, thrombosis, and in-stent restenosis can occur after implantation by using BVS.

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A two-dimensional (2D) WO/ZnO stack reveals a unique carrier transport behavior, which can be utilized as a novel device element to achieve a very high on/off ratio (>10) and an off current density lower than 1 nA cm. These unique behaviors are explained by a dynamic band alignment between WO and ZnO, which can be actively modulated by a gate bias. The performance of FET utilizing the WO/ZnO stack is comparable to those of other 2D heterojunction devices; however, it has a unique benefit in terms of process integration because of very low temperature process capability (T < 110 °C).

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A quantum confined transport based on a zinc oxide composite nanolayer that has conducting states with mobility edge quantization is proposed and was applied to develop multi-value logic transistors with stable intermediate states. A composite nanolayer with zinc oxide quantum dots embedded in amorphous zinc oxide domains generated quantized conducting states at the mobility edge, which we refer to as "mobility edge quantization". The unique quantized conducting state effectively restricted the occupied number of carriers due to its low density of states, which enable current saturation.

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High-pressure annealing in oxygen ambient at low temperatures (∼300 °C) was effective in improving the performance of graphene field-effect transistors. The field-effect mobility was improved by 45% and 83% for holes and electrons, respectively. The improvement in the quality of AlO and the reduction in oxygen-related charge generation at the AlO-graphene interface, are suggested as the reasons for this improvement.

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