Carrier type and density dependence of impact ionization characteristics in WSe.

The impact ionization process offers advantages in achieving low-power and high-speed switching in transistors and also provides high internal gain for photodetectors. We investigate the density dependence of both electron- and hole-initiated impact ionization in WSe. We observe a record-low critical electric field for impact ionization and a large multiplication factor in WSe when the impact ionization is initiated by holes, particularly near a charge-neutral point.

Spiking Neural Network Integrated with Impact Ionization Field-Effect Transistor Neuron and a Ferroelectric Field-Effect Transistor Synapse.

The integration of artificial spiking neurons based on steep-switching logic devices and artificial synapses with neuromorphic functions enables an energy-efficient computer architecture that mimics the human brain well, known as a spiking neural network (SNN). 2D materials with impact ionization or ferroelectric characteristics have the potential for use in such devices. However, research on 2D spiking neurons remains limited and investigations of 2D artificial synapses far more common.

High-κ Dielectric (HfO)/2D Semiconductor (HfSe) Gate Stack for Low-Power Steep-Switching Computing Devices.

Herein, a high-quality gate stack (native HfO formed on 2D HfSe) fabricated via plasma oxidation is reported, realizing an atomically sharp interface with a suppressed interface trap density (D ≈ 5 × 10 cm eV). The chemically converted HfO exhibits dielectric constant, κ ≈ 23, resulting in low gate leakage current (≈10 A cm) at equivalent oxide thickness ≈0.5 nm.

Anisotropy of impact ionization in WSe field effect transistors.

Carrier multiplication via impact ionization in two-dimensional (2D) layered materials is a very promising process for manufacturing high-performance devices because the multiplication has been reported to overcome thermodynamic conversion limits. Given that 2D layered materials exhibit highly anisotropic transport properties, understanding the directionally-dependent multiplication process is necessary for device applications. In this study, the anisotropy of carrier multiplication in the 2D layered material, WSe, is investigated.

A steep-switching impact ionization-based threshold switching field-effect transistor.

A steep switching device with a low subthreshold swing (SS) that overcomes the fundamental Boltzmann limit (/) is required to efficiently process a continuously increasing amount of data. Recently, two-dimensional material-based impact ionization transistors with various structures have been reported with the advantages of a low critical electric field and a unique quantum confinement effect. However, most of them cannot retain steep switching at room temperature, and device performance degradation issues caused by impact ionization-induced hot carriers have not been structurally addressed.

A steep switching WSe impact ionization field-effect transistor.

The Fermi-Dirac distribution of carriers and the drift-diffusion mode of transport represent two fundamental barriers towards the reduction of the subthreshold slope (SS) and the optimization of the energy consumption of field-effect transistors. In this study, we report the realization of steep-slope impact ionization field-effect transistors (IFETs) based on a gate-controlled homogeneous WSe lateral junction. The devices showed average SS down to 2.

Complementary Driving between 2D Heterostructures and Surface Functionalization for Surpassing Binary Logic Devices.

Recently, for overcoming the fundamental limits of conventional silicon technology, multivalued logic (MVL) circuits based on two-dimensional (2D) materials have received significant attention for reducing the power consumption and the complexity of integrated circuits. Compared with the conventional silicon complementary metal oxide semiconductor technology, new functional heterostructures comprising 2D materials can be readily implemented, owing to their unique inherent electrical properties. Furthermore, their process integration does not pose issues of lattice mismatch at junction interfaces.

Homogeneous platinum diselenide metal/semiconductor coplanar structure fabricated by selective thickness control.

For the realization of two-dimensional material-based high-performance electronic devices, the formation of a stable, high-quality metal-semiconductor contact is a key factor. Platinum diselenide (PtSe), a group-10 transition metal dichalcogenide, is a promising candidate owing to its unique property of layer-dependent semiconductor-to-semimetal transition. Here, a scalable and controllable method utilizing an inductively coupled plasma treatment is reported for selectively controlling the thickness of PtSe flakes.