Addressing interconnect challenges for enhanced computing performance.

The advancement in semiconductor technology through the integration of more devices on a chip has reached a point where device scaling alone is no longer an efficient way to improve the device performance. One issue lies in the interconnects connecting the transistors, in which the resistivity of metals increases exponentially as their dimensions are scaled down to match those of the transistors. As a result, the total signal processing delay is dominated by the resistance-capacitance (RC) delay from the interconnects rather than the delay from the transistors' switching speed.

Effect of Flash Light Sintering on Silver Nanowire Electrode Networks.

We investigated the flash light sintering process to effectively reduce electrical resistance in silver nanowire networks. The optimum condition of the flash light sintering process reduces the electrical resistance by ~20%, while the effect of the conventional thermal annealing processes is rather limited for silver nanowire networks. After flash light sintering, the morphology of the junction between the silver nanowires changes to a mixed-phase structure of the two individual nanowires.

Nanoscale Chemical and Electrical Stabilities of Graphene-covered Silver Nanowire Networks for Transparent Conducting Electrodes.

The hybrid structure of Ag nanowires (AgNWs) covered with graphene (Gr) shows synergetic effects on the performance of transparent conducting electrodes (TCEs). However, these effects have been mainly observed via large-scale characterization, and precise analysis at the nanoscale level remains inadequate. Here, we present the nanoscale verification and visualization of the improved chemical and electrical stabilities of Gr-covered AgNW networks using conductive atomic force microscopy (C-AFM), Auger electron spectroscopy (AES), and X-ray photoelectron spectroscopy (XPS) combined with the gas cluster ion beam (GCIB) sputtering technique.

Thermoelectrics. Dense dislocation arrays embedded in grain boundaries for high-performance bulk thermoelectrics.

The widespread use of thermoelectric technology is constrained by a relatively low conversion efficiency of the bulk alloys, which is evaluated in terms of a dimensionless figure of merit (zT). The zT of bulk alloys can be improved by reducing lattice thermal conductivity through grain boundary and point-defect scattering, which target low- and high-frequency phonons. Dense dislocation arrays formed at low-energy grain boundaries by liquid-phase compaction in Bi(0.

Self-assembled single-phase perovskite nanocomposite thin films.

Thin films of perovskite-structured oxides with general formula ABO(3) have great potential in electronic devices because of their unique properties, which include the high dielectric constant of titanates, (1) high-T(C) superconductivity in cuprates, (2) and colossal magnetoresistance in manganites. (3) These properties are intimately dependent on, and can therefore be tailored by, the microstructure, orientation, and strain state of the film. Here, we demonstrate the growth of cubic Sr(Ti,Fe)O(3) (STF) films with an unusual self-assembled nanocomposite microstructure consisting of (100) and (110)-oriented crystals, both of which grow epitaxially with respect to the Si substrate and which are therefore homoepitaxial with each other.

Fabrication and gas sensing properties of hollow SnO2 hemispheres.

Close packed arrays of hollow SnO2 hemispheres were prepared using PMMA microspheres as sacrificial templates for subsequent sputter-deposition of SnO2 films, leading to a threefold enhancement in gas sensitivity compared to non-templated (flat) films.