Publications by authors named "Ciao-Fen Chen"

The recent emergence of Janus 2D materials like SnSSe, derived from SnS, reveals unique electrical and optical features, such as asymmetrical electronic structure, enhanced carrier mobility, and tunable bandgap. Previous theoretical studies have discuss the electronic properties of Janus SnSSe, but experimental evidence is limited. This study presents a two-step method for synthesizing Janus SnSSe, involving hydrogen plasma treatment and in situ selenization.

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In nanostructure assemblies, the superposition of current paths forms microscopic electric circuits, and different circuit networks produce varying results, particularly when utilized as transistor channels for computing applications. However, the intricate nature of assembly networks and the winding paths of commensurate currents hinder standard circuit modeling. Inspired by the quantum collapse of superposition states for information decoding in quantum circuits, the implementation of analogous current path collapse to facilitate the detection of microscopic circuits by modifying their network topology is explored.

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Contact engineering of two-dimensional semiconductors is a central issue for performance improvement of micro-/nanodevices based on these materials. Unfortunately, the various methods proposed to improve the Schottky barrier height normally require the use of high temperatures, chemical dopants, or complex processes. This work demonstrates that diffused electron beam energy (DEBE) treatment can simultaneously reduce the Schottky barrier height and enable the direct writing of electrical circuitry on van der Waals semiconductors.

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Van der Waals (vdW) heterostructures-in which layered materials are purposely selected to assemble with each other-allow unusual properties and different phenomena to be combined and multifunctional electronics to be created, opening a new chapter for the spread of internet-of-things applications. Here, an O -ultrasensitive MoTe material and an O -insensitive SnS material are integrated to form a vdW heterostructure, allowing the realization of charge-polarity control for multioperation-mode transistors through a simple and effective rapid thermal annealing strategy under dry-air and vacuum conditions. The charge-polarity control (i.

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Flexible manipulation of the carrier transport behaviors in two-dimensional materials determines their values of practical application in logic circuits. Here, we demonstrated the carrier-type manipulation in field-effect transistors (FETs) containing α-phase molybdenum ditelluride (MoTe) by a rapid thermal annealing (RTA) process in dry air for hole-dominated and electron-beam (EB) treatment for electron-dominated FETs. EB treatment induced a distinct shift of the transfer curve by around 135 V compared with that of the FET-processed RTA treatment, indicating that the carrier density of the EB-treated FET was enhanced by about 1 order of magnitude.

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The oxygen (O)-dependent resistance change of multilayered molybdenum ditelluride (MoTe) channels was characterized. A variation of the channel resistance could reproducibly determine relative O content (denoted as the O index). We found that Joule heating in a layered MoTe field-effect transistor caused the O index to decrease drastically from 100 to 12.

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