Direct Characterization of Buried Interfaces in 2D/3D Heterostructures Enabled by GeO Release Layer.

Inconsistent interface control in devices based on two-dimensional materials (2DMs) has limited technological maturation. Astounding variability of 2D/three-dimensional (2D/3D) interface properties has been reported, which has been exacerbated by the lack of direct investigations of buried interfaces commonly found in devices. Herein, we demonstrate a new process that enables the assembly and isolation of device-relevant heterostructures for buried interface characterization.

Impact of Etch Processes on the Chemistry and Surface States of the Topological Insulator BiSe.

The unique properties of topological insulators such as BiSe are intriguing for their potential implementation in novel device architectures for low power and defect-tolerant logic and memory devices. Recent improvements in the synthesis of BiSe have positioned researchers to fabricate new devices to probe the limits of these materials. The fabrication of such devices, of course, requires etching of the topological insulator, in addition to other materials including gate oxides and contacts which may impact the topologically protected surface states.

Contact Engineering High-Performance n-Type MoTe Transistors.

Semiconducting MoTe is one of the few two-dimensional (2D) materials with a moderate band gap, similar to silicon. However, this material remains underexplored for 2D electronics due to ambient instability and predominantly p-type Fermi level pinning at contacts. Here, we demonstrate unipolar n-type MoTe transistors with the highest performance to date, including high saturation current (>400 μA/μm at 80 K and >200 μA/μm at 300 K) and relatively low contact resistance (1.

High-Mobility Helical Tellurium Field-Effect Transistors Enabled by Transfer-Free, Low-Temperature Direct Growth.

The transfer-free direct growth of high-performance materials and devices can enable transformative new technologies. Here, room-temperature field-effect hole mobilities as high as 707 cm V s are reported, achieved using transfer-free, low-temperature (≤120 °C) direct growth of helical tellurium (Te) nanostructure devices on SiO /Si. The Te nanostructures exhibit significantly higher device performance than other low-temperature grown semiconductors, and it is demonstrated that through careful control of the growth process, high-performance Te can be grown on other technologically relevant substrates including flexible plastics like polyethylene terephthalate and graphene in addition to amorphous oxides like SiO /Si and HfO .

Realizing Large-Scale, Electronic-Grade Two-Dimensional Semiconductors.

Atomically thin transition metal dichalcogenides (TMDs) are of interest for next-generation electronics and optoelectronics. Here, we demonstrate device-ready synthetic tungsten diselenide (WSe) via metal-organic chemical vapor deposition and provide key insights into the phenomena that control the properties of large-area, epitaxial TMDs. When epitaxy is achieved, the sapphire surface reconstructs, leading to strong 2D/3D (i.